Questions tagged [intel-fpga]

Intel FPGA - formally known as Altera - which is wholly owned subsidiary of Intel, is a major brand of Field Programmable Gate Arrays (FPGA).

Intel FPGA is a company part of Intel creating FPGAs and CPLD. It is a Xilinx competitor. Famous associated name are:

Stratix
Cyclone
Arria
MAX

It also offers intellectual properties like Nios II Processor, Hardware development programs like Quartus, software development programs like Nios Embedded Software.

This link points to various trainings that are free and offered by Intel FPGA.

492 questions

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2 answers

Case statement within a case statement

Is it synthesizable to use: case statement within a case statement case statement within an if statement if statement within a case statement I can compile it without any errors, but I'm still not sure if it would mess up the hardware structure…

vhdl fpga intel-fpga

asked Oct 10 '13 at 19:54

user2849959

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1 answer

How to run this code as Nios hardware?

I got a Nios 2 project that is supposed to be able to run as hardware on my FPGA but how? I've built it and I can run it in the simulator: I've chose the uart0 in the BSP editor But then when I run it as Nios hardware nothing happens Can you tell…

c assembly fpga intel-fpga nios

asked Aug 01 '13 at 10:10

Niklas Rosencrantz

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424

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0 answers

Subversion pre-commit hook filtering unwanted files (most generated by quartus & nios)

I wonder if there's any way the pre-commit hook used in svnserve can "filter" files based on a list of extensions. I have prepared the list which is similar to the global ignore list as in "%APPDATA%/subversion/config" with my own added patterns…

svn pre-commit-hook intel-fpga nios svnserve

asked Jul 24 '13 at 04:29

Peng

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2 answers

ps/2 keyboard interface VHDL

Alright so I'm trying to implement a keyboard controller for use with an altera DE2 FPGA board, and am having some issues. I have ran this code in the quartus simulator and everything seems to be doing what I think it should be doing. However, when…

keyboard vhdl fpga intel-fpga ps2

asked Mar 25 '13 at 22:58

user2209486

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1 answer

Generate Simple Beep on Altera DE2 Board

I've been looking online for solutions on how to generate a simple beep with an DE2 Altera board using VHDL but I can not seem to find anything. I've seen some things that are talking about Audio Codec but I haven't been able to get a firm grasp of…

audio vhdl intel-fpga

asked Apr 25 '12 at 21:22

Will Stumpf

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2 answers

Linux can not detect Altera FPGA

Well, i have an Altera FPGA and USB blaster. I downloaded quartus, but it doesn't detect FPGA, i tried with urjtag and it works fine. I tried running it with sudo, but again the same. Help please

linux usb fpga jtag intel-fpga

asked Apr 21 '12 at 11:55

BKovac

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1 answer

What are minimal compilations steps to start new simulation after changing some file?

This question is about Altera Quartus. Suppose I have a bdf file with few entities. Each entity has it's own VHDL file. I found a bug in one of entities and fixed it (edited a vhdl file). What are minimal compilations steps to start a new…

vhdl intel-fpga

asked Nov 28 '11 at 23:59

vsushkov

2,445
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19
28

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1 answer

Error: object on left-hand side of assignment must have a net type

I am new to working with Verilog, and I was given some code that implements uart. I think it might be missing something since I am getting the compiling error shown below: Error (10219): Verilog HDL Continuous Assignment error at…

verilog intel-fpga

asked May 29 '23 at 15:49

programmer25

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1 answer

Output 'X' instead of '1' or '0' in VHDL

I am working on a code convertor using multiplexors and I am facing issues when testing it on ModelSim. Basically it outputs X where there should output 1. I found out that the error may be where I put others >= '0' as when I changed it to 1; the…

vhdl quartus intel-fpga

asked Mar 09 '23 at 21:00

bestgamer14

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1 answer

How to connect module to module in Verilog?

I am a beginner in the development of FPGA. I am interested in how to correctly combine several modules in the top-level file. For example: in the top-level file, I want to connect the output of module 1 to the input of module 2, and so on. Please…

verilog system-verilog fpga quartus intel-fpga

asked Feb 11 '23 at 09:45

Oleh

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1 answer

SV code: if statement inside always_comb construct does not infer purely combinational logic

I cannot figure out the solution to this error, and the only other answer I find online for the same error is this I have been stuck on this problem for a while and I feel like I am going in circles. I am not sure what I am skipping. The error…

if-statement system-verilog quartus intel-fpga

asked Nov 21 '22 at 21:40

Adam Montano

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0 answers

port SYCL/DPC++ code originally written for GPUs to FPGAs

I'm kinda new to the world of FPGAs and I'm trying to port some code written for GPUs to FPGAs, to compare the performances. From my understanding, using parallel_for ain't a good practice (in fact it runs very slow), instead (I think) I should use…

intel intel-fpga intel-oneapi sycl dpc++

asked Jun 12 '22 at 23:16

Elle

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1 answer

Verilog/SystemVerilog: passing a slice of an unpacked array to a module

I am using a DE10-Nano with Quartus Prime to try to implement the following. I have two modules: Module1 and Module2. Module1 declares a RAM like this: reg [15:0] RAM[0:24576]; // init RAM 0:8191 with all 1 And then passes a subset of the RAM to…

verilog system-verilog fpga intel-fpga

asked Apr 26 '22 at 23:10

Giuseppe Rossini

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0 answers

Flashing a Cyclone IV's SROM chip via its JTAG connection

Is there an inbuilt or pre-existing feature I can use to accomplish Flashing a Cyclone IV's(EP4CE6E22C8) SROM(W25Q16BV) chip via its JTAG connection? Maybe some setting when compiling in Quartus to tell the FPGA "Hey flash this". Or a specific…

fpga intel-fpga flashing

asked Feb 05 '22 at 11:15

Arcane Blackwood

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1 answer

How can I check if the FPGA device is connected to the server?

For some reason, I can only remotely control a server containing FPGA (Intel Arria 10 GX FPGA). But when I use the command in Intel OpenCL for FPGA to find the driver, I cannot find the FPGA device that can be used. The command is as follows: aocl…

linux opencl fpga intel-fpga

asked Dec 07 '21 at 12:41

YA xiang

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