Questions tagged [vlsi]

Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device.

Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device.

In addition, VLSI Technology, Inc was a company which designed and manufactured custom and semi-custom ICs. The company was based in Silicon Valley, with headquarters at 1109 McKay Drive in San Jose, California. Along with LSI Logic, VLSI Technology defined the leading edge of the application-specific integrated circuit (ASIC) business, which accelerated the push of powerful embedded systems into affordable products.

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Check synthesis output online?

Is there any tool/application available online which helps me to check the synthesis output of the RTL written? Example: I have written some RTL code(In verilog) and want to check -> If it is synthesize-able or not? -> Netlist RTL has generated.
Hemant Bhargava
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How does clock gating in RTL design work?

I'm trying to understand how clock gating works in RTL design. I've an example wave here: Description: 1st signal is gated_clock 2nd signal is clock_enable 3rd signal is ungated_clock So there are 3 cycles in this wave (let's say cycle 0,1,2). In…
newbie
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how to remove the latch in vhdl and purpose of RTL_ROM?

The code below is a simple 16 bit adder(which uses only one four bit adder). i tried avoiding all the latches. But i am not able to remove the latch that is highlighted(sum_16_temp) in the image. can any one help me in avoiding this latch. And i…
Raviteja
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How do I label a memory location in ARM assembly?

While writing a code in ARMSIM, I want to label a particular memory location(say) 0x2000 as PATH and use it in the ARM assembly code in MOV, LDR,STR instructions. Please let me know if this is possible.
aravind d
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Unwanted one clock delay vhdl

can someone explain me why I have one clock delay on my simulation of the following and how can I fix it, it shouldnt be there cause I am missing a bit on the output.... entity outBit is port( clk1 : in STD_LOGIC; clk2 : in STD_LOGIC; …
Franx
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Should Xst 646 warning in Xilinx be ignored?

In my code, I've to use some registers which are used to store some values for making decision in code. They don't directly take values from input wire. Now, I'm getting ... Signal is assigned but never used. This unconnected signal will be…
Tusher
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Connectivity graph of a combinational circuit

I am reading the book called, "VLSI Physical Design: From Graph Partitioning to Timing Closure" by Andrew B. Kahng, Jens Lienig, Igor L. Markov, and Jin Hu. In that book, there is a picture of a combinational circuit like shown in Fig 1. For the…
Kori
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micro-programmed control circuit and one questions

I ran into a question: in digital system with micro-programmed control circuit, total of distinct operation pattern of 32 signal is 450. if the micro-programmed memory contains 1K micro instruction, by using Nano memory, how many bits is reduced…
user4554402
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Encoder and My Challenges on Digital Logic

in following Encoder, the priority of bigger number is bigger. if the initial state is 0, after how many clock pulse, Q after being 1, change states to zero. My professor, say (3), why ?
user4559497
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Can I make 4x4 multiplier only using 2x2 multiplier?

I want to implement to 4x4 bits multiplier using only 2x2 bits multiplier. for example, a=1110 b=1011 The 2x2 result is should be 10011010. I think that I can split like this. #case 1 a=10 b=11 2x2 multiplier's result = 0110 #case 2 a=11 b=10 2x2…
Carter
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What is the improve way to multiplying by 15?

I'm trying to implement as follows to multiplying by 15. module mul15( output [10:0] result, input [3:0] a ); assign result = a*15; endmodule But is there any improve way to multiplying to a by 15? I think there are 2 ways like this 1.result…
Carter
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What is the result of synthesis?

I'm trying to implement to gate as follows. But i'm not sure how does it synthesis to gate? case 1 wire [3:0] A, B, C, D; always @(posedge CLK) begin C=B; B=A; A=D; end case 2 wire [3:0] A, B, C, D; always…
BONGKA
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BCD adder and Decimal Output

For Calculating Decimal Output of 125 * A - 100 * (A Mod 4) + 2 with having A ( one BCD digit) Which of the following is True? 1) we need at least two decimal adder. 2) we need at least two 4-bit binary adder. 3) we need at least one decimal…
user4249446
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Re-configurable Memory Instance in verilog with DATA-IN and DATA-OUT are passed as parameter

How can I make a memory module in which DATA bus width are passed as parameter to each instances and my design re-configure itself according to the parameter? For example, assuming I have byte addressable memory and DATA-IN bus width is 32 bit (4…
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Justify button text to left in TCL TK

I'm trying to build Gui with Tcl.tk and use it inside ICC (Synopsys). Problem: All texts are justify to center instead of left. every creation of "checkbutton" show text at center. How can I order texts to be justify left side? How can I disable…
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