Questions tagged [microprocessors]

A microprocessor incorporates the functions of a computer's central processing unit (CPU) on a single integrated circuit (IC).

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What is the difference between FIQ and IRQ interrupt system?

I want to know the difference between FIQ and IRQ interrupt system in any microprocessor, e.g: ARM926EJ.
Renjith G
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Why is x86 little endian?

A real question that I've been asking myself lately is what design choices brought about x86 being a little endian architecture instead of a big endian architecture?
bfrog
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What is a stack pointer used for in microprocessors?

I am preparing for a microprocessor exam. If the use of a program counter is to hold the address of the next instruction, what is use of stack pointer?
KAR
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What are 16, 32 and 64-bit architectures?

What do 16-bit, 32-bit and 64-bit architectures mean in case of Microprocessors and/or Operating Systems? In case of Microprocessors, does it mean maximum size of General Purpose Registers or size of Integer or number of Address-lines or number of…
user366312
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How do memory fences work?

I need to understand memory fences in multicore machines. Say I have this code Core 1 mov [_x], 1; mov r1, [_y] Core 2 mov [_y], 1; mov r2, [_x] Now the unexpected results without memory fences would be that both r1 and r2 can be 0 after…
MetallicPriest
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What is the minimum instruction set required for any Assembly language to be considered useful?

I am studying Assembly programming in general, so I've decided to try and implement a "virtual microprocessor" in software, which has registers, flags and RAM to work with, implemented with variables and arrays. But since I want to simulate only the…
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How can I cause an instruction cache miss?

I've been tasked with generating a certain number of data-cache misses and instruction-cache misses. I've been able to handle the data-cache portion without issue. So I'm left with generating the instruction-cache misses. I do not have any idea what…
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What is meant by the FENCE instruction in the RISC-V instruction set?

While going through the RISC-V ISA, I have seen an instruction in the memory model section (FENCE instruction). What does it mean exactly?
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CPU TSC fetch operation especially in multicore-multi-processor environment

In Linux world, to get nano seconds precision timer/clockticks one can use : #include int foo() { timespec ts; clock_gettime(CLOCK_REALTIME, &ts); //--snip-- } This answer suggests an asm approach to directly query…
Jay D
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Instruction decoding when instructions are length-variable

Here are some instructions and their corresponding encodings: 55 push %ebp 89 e5 mov %esp,%ebp 83 ec 18 sub $0x18,%esp a1 0c 9f 04 08 mov 0x8049f0c,%eax 85 c0 …
scdmb
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What is the difference between Stack Pointer and Program Counter?

As we always know the procedure of executing task by a microprocessor is just executing binary instructions from memory one by one and there is a program counter which holds the address of the next instruction. So this is how processor executes it's…
Naasif
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What is the difference between processor (CPU) and microprocessor?

what is the difference between "processor (CPU)" and "microprocessor" in the sense of computer architecture? These terms confuse me.
user3035481
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difference between memory address register(MAR) and program counter(PC)?

How memory address register(MAR) and program counter(PC) are different from each other?
Imran
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is there a verilog tutorial where you build a very simple microprocessor?

I'm a programmer wishing to learn verilog. What would be amazingly neat would be a tutorial where one constructs a tiny microprocessor with a very clean design, something like an Intel 4004, and then goes on to actually make it using an fpga and…
John Lawrence Aspden
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Implementation of simple microprocessor using verilog

I am trying to make a simple microprocessor in verilog as a way to understand verilog and assembly at the same time. I am not sure if I am implementing what I think of microprocessors well enough or if I am completely wrong. Should I simplify the…
AdoobII
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