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Questions tagged [intel-fpga]

Intel FPGA - formally known as Altera - which is wholly owned subsidiary of Intel, is a major brand of Field Programmable Gate Arrays (FPGA).

Intel FPGA is a company part of Intel creating FPGAs and CPLD. It is a Xilinx competitor. Famous associated name are:

  • Stratix
  • Cyclone
  • Arria
  • MAX

It also offers intellectual properties like Nios II Processor, Hardware development programs like Quartus, software development programs like Nios Embedded Software.

This link points to various trainings that are free and offered by Intel FPGA.

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Get "VHDL Subprogram error" in to_integer call

I want get the integer value of float32 value passed as input parammeters, i am using to_integer() function. but i get the error in compilation step: Warning (10445): VHDL Subtype or Type Declaration warning at float_pkg_c.vhdl(1022): subtype or…
Antônio Vieira
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4 Bit Adder using port maps

So I am trying to do a 4 bit adder and have ran into an error I can't seem to figure out. Error (10430): VHDL Primary Unit Declaration error at adder1.vhd(3): primary unit "Adder1Vhd" already exists in library "work" I have a project called 4 bit…
Shawn
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How to print an integer in Nios 2?

I've written code than handles interrupts and I added a function that will do something "useful" (calculating the next prime) and that should handle interrupts. The interrupts are working but not printing the calculated primes from within the while…
Niklas Rosencrantz
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Why unresolved inclusion?

I wonder why I get the error msg "unresolved inclusion" for stddef.h The background is this question: https://stackoverflow.com/questions/18754434/altera-de2-hardware-timer-usage where I try to solve the entire hw interrupt mechanism that I now…
Niklas Rosencrantz
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Polling with C and assembly for Nios 2

I want to call the pollkey function once per millisecond and increment the time variable (timeloc) once per second. I think that it should work if I add a call pollkey to the delay subroutine so why is it not working? .equ delaycount, …
Niklas Rosencrantz
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How to develop this algorithm?

pollkey() should be called every millisecond and tick(&timeloc) should be called every second and I don't have a thread library. The obvious way would be to do it with threads but now it seems that I need advice how to perform both the updates. The…
Niklas Rosencrantz
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compiling Verilog code in Quartus

I'm new to verilog HDL and my first project is to implement a simple stopwatch counter using a set of registers. I'm using Altera Quartus. When I tried compiling the code below, I keep getting an error for each and everyone of the registers. one…
user2707696
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Can't compile my system in Qsys

When trying to assemble the system according to the instructions in this document http://www.cs.columbia.edu/~sedwards/classes/2013/4840/lab3.pdf I get this error message: Error: System.nios2_qsys_0: Reset slave sram_0.avalon_slave_0 not connected…
Niklas Rosencrantz
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Programming EP2C35F672C6 FPGA purchased

I am new to FPGAs & board development. This semester, I was introduced to Quartus II, VHDL, and FPGAs. I have uploaded several basic designs onto the DE2 Board, which has an EP2C35F672C6N FGPA on it. However, every time I power up the board, I must…
Haleeq Usman
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Frequency divider by any integer 1-16

I have implemented a frequency divider by the powers of 2. Now I am interested in doing a divider by any integer number from 1 to 16. Yes, I have tried but yet no ideas. How can I approach this problem? I want to use common elements like…
twist900
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verilog parameter as input - nios II

I am looking out for a way so that I can send an input value from nios as a parameter to a verilog module. or Any other ways of assigning verilog parameter from input.
vlsi2013
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ModelSim - Simulating Button Presses

I want to use four push buttons as inputs and three seven-segment LED displays as outputs. Two push buttons should step up and down through the sixteen RAM locations; the other two should increment and decrement the contents of the…
John Roberts
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How to find system library properties in Nios 2 IDE v12?

I'm trying to make a project according to the spec but the dialogs seem to have changed completely in version 12. I don't nearly get similar dialogs in Nios 2 IDE v12. This is what I search: This is what I get, and nothing leads to a dialog like in…
Niklas Rosencrantz
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Cyclone II FPGA active serial using usb blaster

I'm automating programming and diagnostics for several PCBs with Cyclone II FPGA chips. Ideally I'd like to program the chips using my own program, but I could settle for a command line script. Is it possible to download a .pof file to a cyclone II…
Megimoo
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working on a project using altera DE2-115, the project involves showing output on a screen

working on a project using altera DE2-115, the project involves showing output on a screen, i'm having hard time using VGA with verilog, could you please show or link me to a very simple working example so that i could understand the concept and…
user1465148
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