Highest Voted 'spartan' Questions

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VHDL is incomplete. The signal is not driven by any source pin in the design

I'm trying to write a very simple program on a Spartan-3E development board. I want to read the slide switches and use the LED next to the slide switches to indicate which switch is in the on position. Here is my code: library IEEE; use…

asked Aug 21 '15 at 14:04

hfbroady

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Implementing Ethernet MDIO/SMI interface in VHDL

I'm working on connecting the LXT972M PHY Transceiver to LPC2368 chip. I've already done the RMII to MII converter, but I can't figured how to implement that bidirectional MDIO signal in VHDL. As I just spotted it must be managed by some additional…

arm vhdl fpga ethernet spartan

asked Jul 31 '15 at 17:22

SebastianKupisDev

46
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1 answer

vhdl code for producig triangular wave using DAC2904 is not working

I am doing a project in college and want to produce a triangular wave using a DAC2904 and a Spartan 3 xc3s5000 board. I have written code for it but is not working. I don't know may be it is the problem in code or in my ucf file: library ieee; use…

vhdl fpga adc spartan

asked May 28 '15 at 08:41

siddu

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What is the Intel Strata Flash Memory on Spartan-3E Starter Kit?

What would an use case scenario be like? I know that there's plenty information about this in the user manual, but i'm a beginner and don't know really how to handle that information. Thank you for your time.

flash intel fpga spartan

asked Apr 30 '15 at 09:00

user2128436

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2 answers

Bus timing constraints

I'm programming a Xilinx Spartan-6 on an OpalKelly implementation for my master thesis at university. To be precise, this is the FPGA I'm working on (XEM6010-LX45): https://www.opalkelly.com/products/xem6010/ It is mounted on a board that has to…

constraints vhdl timing xilinx spartan

asked Mar 27 '15 at 01:25

FlyerDragon

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enabling gpio pins on spartan 3

I am trying to run a dc motor using spartan 3 fpga board and i need to take out 2 pins from the board as the input pins to my motor driver. I am not able to enable them. i have already declared them as out std_logic and i have also generated a…

gpio spartan

asked Mar 22 '15 at 14:27

Ruchi Patil

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Trying to make a 4-bit multiplier in VHDL with 3x4 keypad input and 2x16 LCD to be implemented on a Spartan 3E board

everyone. I'm trying to make a 4-bit multiplier in VHDL. It is to be implemented on a Spartan 3E board using the built-in 2x16 LCD and a 3x4 keypad through a C922 IC. Using it goes like this: user inputs a number through the keypad, presses a button…

vhdl multiplication lcd keypad spartan

asked Oct 27 '14 at 12:08

jlgazo

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Signal is assigned but never used. This unconnected signal will be trimmed

To start with - I have three dimensional reg, assigned only in initial begin. reg [4:0] PS[0:9]; PS[0] = 24; PS[1] = 10; PS[2] = 8; PS[3] = 8; PS[4] = 17; PS[5] = 16; PS[6] = 4; PS[7] = 4; PS[8] = 16; PS[9] = 16; At first i was trying to access…

verilog fpga xilinx spartan

asked Dec 30 '13 at 12:12

Andrzej Pytel

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2 answers

Data Transfer between two Spartan 3E

I'm trying to do ADC-DAC with two separate Spartan 3E kits. First kit will get analog signal and convert it to digital. Second kit will get this converted digital data and convert it to analog again. I successfully implemented ADC and DAC…

vhdl transfer adc spartan

asked Dec 13 '13 at 20:24

Levent Bekdemir

67
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1 answer

Identifying a start of a frame

I have implemented a HDMI Transmitter and receiver on a Atlys Spartan 6 board. Its working properly. I am using 1080p @ 60Hz. The board takes a one pixel, decodes it, encode it back and send it to the monitor. Now i need to identify the start of a…

fpga hdmi spartan

asked Nov 25 '13 at 19:51

user2389323

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4 answers

Generating Single Port ROM on Spartan 6 using Xilinx ISE Design Suite

I'm having some trouble designing a single port rom onto a spartan 6 board. I use the provided core generator to create block memory and choose single port rom with 32 bit width and 256 depth with a coe file that just counts from 0 to 255. I drop…

vhdl fpga xilinx spartan

asked Apr 13 '13 at 19:14

NorthGuard

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How can my vhdl code and microblaze co-exist?

Well my problem stated when i had my vhdl code up and running on my Spartan-3a but needed to send and receive data from it to the pc, I need my vhdl code , so i went for a microplaze structure , problem is I cant understand how will my vhdl code and…

usb vhdl fpga spartan

asked Mar 31 '13 at 00:41

Omar shaaban

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2 answers

How to put VHDL project on Spartan 6 FPGA

I am working on a project in VHDL that will be placed onto the spartan 6 fpga. The code is ready but I am not sure how to proceed with getting it onto the fpga. I have access to another project and noticed that this project has a Microblaze…

vhdl fpga xilinx spartan

asked Mar 21 '13 at 13:06

RXC

1,233
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Getting data from microprocessor VHDL Spartan 3A

I have an app who's instantiating a micropocessor that we develop on vhdl course, it also is displaying data on the LCD display of the FPGA. We have tested the micro and the LCD separately and they do work. Now the idea is to display the data of the…

vhdl fpga microprocessors spartan

asked Dec 02 '11 at 22:54

BRabbit27

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VHDL State Machine for LCD initialization

I'm trying to implement the initialization of a LCD of the Spartan 3AN. I'm very new to this so every advise is very welcome. My code is as follows: ---------------------------------------------------------------------------------- -- Company: --…

simulation vhdl state-machine spartan

asked Nov 05 '11 at 02:22

BRabbit27

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Questions tagged [spartan]