1

I am trying to run a dc motor using spartan 3 fpga board and i need to take out 2 pins from the board as the input pins to my motor driver. I am not able to enable them. i have already declared them as out std_logic and i have also generated a constraint file for them, but after checking the output on those pins i am getting 0volts. what should I write in the code, do i have to declare them as signals? please tell me how to enable them in vhdl code. below i have given my vhdl code

`entity dc_motor is
port ( clk : in std_logic;
       rst : in std_logic;
       io_pin1:  out std_logic;
       io_pin2 : out std_logic);
end dc_motor;

architecture Behavioral of dc_motor is

begin
process(rst,clk)
variable i : integer := 0;
begin
if rst = '1' then
if clk'event and clk = '1' then
--enable <= '1';
if i <= 1005000 then
i := i + 1;

io_pin1 <= '0';
io_pin2 <= '0';
elsif i > 1005000 and i < 1550000 then
i := i + 1;
 io_pin1 <= '1';
 io_pin2 <= '0';
elsif i = 1550000 then
i := 0;
end if;
end if;
end if;
end process;
end Behavioral;
`
  • 1
    What does your .ucf file look like? Could you post the connections for the I/O pins you made there (plus the exact model and package for the spartan 3)? – koukouviou Mar 22 '15 at 18:26
  • NET "CLK" LOC = "T9"; NET "RST" LOC = "L14"; NET "OUTPUT1" LOC = "A5"; this is my constraint file. – Ruchi Patil Mar 24 '15 at 18:59
  • i am using spartan 3 chip - xc3s200 and the package number is (FT256). – Ruchi Patil Mar 24 '15 at 19:02
  • Where are the "CLK", "RST" and "OUTPUT1" signals in your design? Do you have a top level entity? You can more easily debug your design by also driving two leds on the chip along with the i/o ports instead of measuring voltage each time you run the design. – koukouviou Mar 24 '15 at 22:17

0 Answers0