Questions tagged [pci-e]

PCI-Express (PCIe) is a peer 2 peer interconnect which is based on PCI and PCI-X. Newest generation is gen 5.0. PCIe is maintained and developed by PCI-SIG.


Versions

  • PCIe Gen1 -- Released in 2003, PCIe Gen 1 supports bandwidth of 2.5 GT/s per lane per direction.
  • PCIe Gen2 -- Released in January 2007. PCIe Gen 2 supports bandwidth of 5 GT/s per lane per direction.
  • PCIe Gen3 -- Released in November 2010. PCIe Gen 3 supports bandwidth of 8 GT/s per lane per direction.
  • PCIe Gen4 -- Released in November 2011. PCIe Gen 4 supports bandwidth of 16 GT/s per lane per direction.
  • PCIe Gen5 -- Released in June 2017. PCIe Gen 5 supports bandwidth of 32 GT/s per lane per direction.

References

PCIe (Wikipedia)


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How to emulate a pcie device which has a cpu?

Now, some pcie device has a cpu, ex:DPU. I want to use qemu to emulate this device. Can qemu support this requirment?
Jams.Liu
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How is the NVIDIA RTX A6000 getting 300 watts via a single 8-pin?

According to: https://www.nvidia.com/content/dam/en-zz/Solutions/design-visualization/quadro-product-literature/proviz-print-nvidia-rtx-a6000-datasheet-us-nvidia-1454980-r9-web%20(1).pdf the NVIDIA RTX A6000 uses up to 300 watts of power. It has a…
GLJeff
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How PCIE Root complex moves DMA transaction from PCIe endpoint to Host memory

I have very basic doubt ,how PCIE Root complex moves DMA transaction from PCIe endpoint to Host memory. Suppose ,Pcie EP(End Point) want to initiate a DMA write transaction to HOST memory from its local memory. So DMA read channel present on PcieEP…
SUN
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Can QEMU emulate PCIe link bandwidth as well?

Is QEMU's PCIe only functional emulation? Or is it possible to emulate the actual bandwidth? For example, if it is set to 1-lane PCIe, does it emulate a PCIe link with a bandwidth of 1GB/s? If it is set to 4-lane PCIe, does it have a bandwidth of…
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Finding physical addresses of NVIDIA GPU memory for DMA

I am trying to find the physical PCIe address space memory locations of GPU memory to support inbound DMA initiated by an external PCIe resource such as an FPGA (similar to How to get physical address of GPU memory for DMA? (OpenCL)). We are…
Seth Robertson
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Is PCI Express capability ID required or optional?

I'm attempting to identify if a system is using certain cards that are PCI or PCI-Express at runtime of a program. I understand that the PCI config space has the capability ID list. Does this always have 0x10 (the capability code for PCI-E) if the…
LukeDev
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How to access pci device from another device

I'm creating new PCI device in qemu that is part DMA and part NVMe controller. And I need to get the physical address of the NVMe device, from within my new device to use dma_memory_read(...) Is there a function to get new device address? Is there…
Dor marcus
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How to read PCIe complete register space in Linux terminal sysfs

I am using Ubuntu and from terminal I am able to read the Type 0 Configuration space of PCIe by using "setpci", "lspci" or "pcimem". With both commands I am only able to read from 00h to 3Ch addresses. I want to read a specific register value whose…
user777304
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Can a write to a PCI memory-mapped register cause a CPU to freeze with no exceptions?

I'm debugging a driver for a PCI device. The registers for the device are memory mapped. I've narrowed down the freeze to a single line: *(pci_dev->registers + reg_offset) = RandomValue; The freeze doesn't always happen, but when I run it on a loop…
David Davidson
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Difference between DVSEC, VSEC and RCRB

Can someone please explain what is difference between VSEC and DVSEC. As I understood VSEC is tied with vendorID but DVSEC not, but still not clear how? And what is Rot complex register block - RCRB? Why user need it when there is DVSEC?
haykp
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PCIe device communication in Linux/PCIe driver

I would need to connect to a Frame Grabber card (that itself connects to a camera through a camera link interface), with a FPGA that runs some image processing application, connected to my computer board through PCIe interface, to get images and…
Ma Ta
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/sys/bus/pci/devices//rescan file missing on Ubuntu Kernel 5.4.14.050414-generic

On my ubuntu I am missing rescan files under /sys/bus/pci/devices// Does anyone know how to restore them? Can I simply copy them from /sys/bus/pci/rescan ? Ubuntu : 16.04.6 LTS Kernel: 5.4.14.050414-generic NVMe driver version: 1.0
User1990
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Does UIO generic PCI support interrupts?

I use uio generic driver with HW composed of PCIe device (FPGA) connected to Intel ATOM cpu. But, on testing, although interrupt is seen in the driver, it is not delivered to userspace. These are the steps I'm doing: echo "10ee 0007" >…
ransh
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How does PCIe Endpoint device memory is mapped into the systems memory map (MMIO)?

How does Linux Kernel or BIOS map the PCIe endpoint device memory into systems MMIO space ? Is there any API to achieve it ? Lets assume that when writing a Linux device driver for a PCIe endpoint device, How can we map PCIe device memory into MMIO…
Usr1
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Can a non-enumerated device conduct DMA operations?

PCIe devices can read or write to memory, i.e. can do DMA without requiring a device driver. If I remember correctly, if you flash a device's firmware (let's say an FPGA device) and input 0xFFFF as device and vendor ID, the device won't be…
Jordan T.
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