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Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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Assembler use of segment register

Recently I was writing assembly and the program I wrote ran without any problems under DOSBox. Now I need to port the same program into a real computer using DOS but some problems arised. First of all, under DOSBox I was compiling with ML, but on…
Triak
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Terms used for addressing modes. [intel 8085]

In the documentation of a processor I am working on it says : Operand addressing modes available are implied, register, immediate, direct and register indirect (using the BC, DE and HL register pairs as 16-bit pointers to memory). Can…
Johnny Riley
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difference between Virtual address and Modified virtual address in ARM architecture

I am new in arm and arm instruction set. in the document of ARM-Cortex A8 i have seen some commands like cache flush accept input address as MVA ( modified virtual address). there is any difference between "Modified Virtual Address" and "Virtual…
alireza sadeghpour
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How to use explicit addressing in IBM (HLASM)

I’ve been looking for information about explicit addressing, online but there is nothing and there is, the explanations are pretty vague. I hope someone can explain me with details and if possible witn example. I would like to know, what registers…
Andy Olivares
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68k ASM addressing modes

I learned some 68k/Coldfire at the Uni, and having difficult understanding the more complex addressing modes (with the numbers near the parentheses of dereference). I think example are the best here: A) lea: A1) lea $5(a1,a2.l), a0 A2) lea…
Lala yoyo
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Can't subtract registers in an addressing mode?

I finished reading PC Assembly Language and I was working on an implementation of RC4 encryption in Assembly. What I can't comprehend is why mov eax, [edx+ecx] works but mov eax, [edx-ecx] doesn't. The inline assembler gives me this error…
shebaw
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rbp not allowed as SIB base?

I'm quite new to x86-64 binary encoding. I'm trying to fix some old "assembler" code. Anyways, I'm trying to do something like this (Intel syntax): mov [rbp+rcx], al The assembler is currently generating this: 88 04 0D but that doesn't seem to…
ollpu
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Array addressing in AT&T GAS assembly. Register offset from RIP doesn't work

I'm trying to work with arrays in GNU assembly. In my opinion the following code must exit with value 3. But it exits with 13. .section __DATA,__data inArr: .word 13, 2, 3, 4, 5, 6, 7, 8, 9, 10 outArr: .fill 10, 2 .section…
Roman Pavlov
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Why can't MIPS use two registers in an addressing mode?

I'm curious as to why we are not allowed to use registers as offsets in MIPS. I know that you can't use registers as offsets like this: lw $t3, $t1($t4); I'm just curious as to why that is the case. Is it a hardware restriction? Or simply just part…
KnowingQuasar
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Assembly Indexed Mode

Here's the assignment: Write a program in assembly such that it contains a subroutine which performs the AND operation with the entry of register R6 and hexadecimal #0001h. And then repeat it by applying the same operation to five successive memory…
Ashley DePaz
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Unknown assembly syntax: .LC0(%rip)

I have been studied assembly language based on gcc -S outputs, and i find some syntax i've not seen before. From C code: #include void main() { printf("%d\n", sizeof(int)); } I've got this: .file "test.c" .def …
wojcienty
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Difference between commands with [] and without in ARM assembly

I noticed that in ARM assembly, there are 3 types (that I known of, there are maybe even more) of load/store commands. So far I've seen: STR R0, [R1, #4] STR R0, [R1], #4 LDR R0, R1, #4 These are just examples of the commands I've…
Leonz
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Base + Offset Addressing Mode

I just need an explanation of how base + offset addressing modes work. Having trouble finding a clear-cut answer for this. (I've been working with the LC-3, not sure if that matters). A simple example would also be helpful. Thank you!
Matt
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Dealing with the overflow of a 9bit result to an ADD op that is supposed to store in a byte ptr in x86

I am working on a problem for my introductory computer organization course at UCI and we use x86 assembly language in the course (using Visual Studio and the MS syntax). While the problem is for a homework assignment, we are graded on attempts and…
Kyle Bendickson
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Is there an offset writeback on x86?

With ARM I can access a memory location like this: LDR r0, [r1, #4]! Meaning I want to load the value pointed to by r1, with an offset of 4 bytes, and the ! means that I want the value of r1 to be updated after this instruction with the new value…
Daniel Scocco
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