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Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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mov instructions with byte destination for immediate to memory

I am reading a textbook entitled Introduction to 80x86 Assembly Language and Computer Architecture by Richard C. Detmer I have a question about immediate to memory mov opcode. Here the portion of text I am referring too: Continuing down figure 4.1,…
Code Doggo
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What is the difference between these addressing modes...?

What is the difference between a register, indirect, base+displacement, double indirect, and PC relative. I'm not quite sure I understand how to differentiate between these different addressing modes given their use in some situation. Can someone…
Bob John
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addressing modes in PDP-11

I have this instruction: Move @-4(pc), 766(r5) pc : 1000 (start point) Can you explain how this instruction should run?
Rawhi
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What does leal (%eax, %eax) do?

What does leal (%eax, %eax) do? Does that multiply the contents at %eax * 2 since it has parens?
fvertk
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x86 instruction meaning

I'm running through some code right now on gdb and I have no clue what these two instructions actually do. If anyone could help me out, I'd really appreciate it. add -0x2c(%ebp, %ebx, 4), %eax cmp %eax, -0x28(%ebp, %ebx, 4)
user1642463
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@ sign in assembler?

I am doing an assignment for an information systems class and the professor decided to use psuedo-assembler. He used the @ in SUB @106, -2(104), 110 What does that symbol mean?
Serguei Fedorov
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8086 Assembly ADD addressing mode

Hello I am writing assembly code for 8086 but I am wondering how does CPU differentiate between for example AND AX, [memoryaddress] and AND AX, memoryaddress we are putting [] around it to indicate that it should be replaced by that addresses…
EralpB
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Assembly stack index address

I'm trying to debug a program with ollydbg and I have a doubt to index mode address using SS prefix. Here's a screenshot: At this point, the instruction MOV BYTE PTR SS:[EBP-1],BL will move the 8-bits from EBX to address pointed in EBP(0012FDCC)…
andmart
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Difference between register indirect and base plus offset in MIPS addressing mode?

What is the difference between register indirect and base plus offset, and how does it affect how you write assembly on the MIPS architecture? I think it means that you can only reference the register in an instruction, and that register has to…
knownasilya
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Assembly What are *ALL* possible arithmetic possibilities in brackets?

I'm making a x86 asm to C code emulator.. and for my parser I am up to the bracket parsing QWORD PTR [ to ] DWORD PTR [ to ] WORD PTR [ to ] BYTE PTR [ to ] MOV X, [ to ] LEA X, [ to ] For now I will ignore.. MMWORD PTR[] XMMWORD PTR[] FWORD PTR…
SSpoke
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Correct usage of the RIP related addressing

I found example of code on assembly, which finds the maximum number in array named data_items but that example was for x86 and I tried to adapt it for x64 because 32 bit absolute addressing is not supported by 64 bit system. To be short there are…
Arsynth
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What is the allowed range for offsets in for example LEA RAX, [RBX+off]

Now I am pretty sure this is a basic question but I couldn't find the answer. How many bits at most can offset be ?
Aaa Bbb
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Basic Assembly Memory Location

Are the following the same? add eax, 2 mov [eax+2], ebx vs mov [eax+4], ebx am i correct to say that: Assuming initial value stored in eax to be 0x40000050, both will result in writing value stored in ebx to address location 0x40000054? Or does…
J. Cena
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Force RIP-relative access to fixed offset in NASM

For a binary instrumentation project I wrote a chunk of assembly code in NASM, which gets mapped into a binary's address space at runtime. The chunk gets loaded at address instrument_addr, and needs to access data at address…
janw
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Offset an index with the value in another register ARMv8

If I am able to load a register (R5) with a value from memory + some offset using the command: LDR R5, [R12, #4] How would I go about using the value of another register (R7 =0x0004 for example) as the offset? LDR R5, [R12, &R7]
Ethan Granucci
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