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Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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6502 emulator in C/C++: how to separate addressing mode code from actual instruction code

In the spare time I'm starting writing a very simple C++ emulator for the 6502 CPU. I used to write down a lot of assembly code for this CPU so all the opcodes, addressing modes and other stuff are not a big deal. The 6502 has 56 different…
Gianluca Ghettini
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NASM x86 16-bit addressing modes

I am having trouble with pointing to a address and write in my case a variable of byte in size. This gives me the error "error: invalid effective address": mov byte[AX], byte 0x0 After some trail and error i tested the same but with EAX. This…
Michael
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M68K: predecrement on the same register

In M68040 asm, given: mov.l #0x1000, %a0 mov.l -(%a0), -(%a0) What is the %a0 value after the second mov? Is the register decremented twice or once? What instead of mov.l we use one of the few other instructions that support…
sbabbi
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What happens if I omit the scale factor of and indexed addressing mode in x86 AT&T syntax?

I'm new to assembly and I'm learning it from Programming from the Ground Up. On pages 41 and 42, the book talks about indexed addressing mode. The general form of memory address references is…
Amirreza A.
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Why don't x86 16-bit addressing modes have a scale factor, while the 32-bit version has it?

I'm trying to figure out a reason for the scale factor not being present in the x86 16-bit addressing modes (MASM assembly). While the 32-bit and 64-bit addressing modes have a scale factor. Is there an actual reasoning behind this or it doesn't…
codezart
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Can rip be used with another register with RIP-relative addressing?

I'm familiar with memory references of this form: XXX ptr [base + index * size + displacement] where XXX is some size (byte/word/dword/etc), both base and index are registers, size is a small power of two, and displacement is a signed value. amd64…
zneak
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Can an instruction be in two addressing modes at the same time?

I have read the following in the book Programming from the Ground Up: Processors have a number of different ways of accessing data, known as addressing modes. The simplest mode is immediate mode, in which the data to access is embedded in the…
user8240761
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Trying to understand this short assembler instruction but I don't understand

We had a task, given was an assembler instruction of a 2-addressing machine: mov 202, 100[r1+] Note down a minimal assembler instruction sequence which replaces this instruction (see above) where n[rx+]: register indexed by post increment; n…
user6530185
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x86 opcode encoding: sib byte

I'm currently trying to write a disassembler. I found the following list of opcodes and their meanings, so i decided to parse it at runtime: http://web.archive.org/web/20150810224114/http://mprolab.teipir.gr/vivlio80X86/pentium.txt But i am stuck at…
Zotta
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What is the meaning of MOV (%r11,%r12,1), %edx?

What does this instruction do? mov (%r11,%r12,1), %edx
anonymous
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What value from memory or register do each of the AT&T syntax operands access?

Assume the following values are stored at the indicated memory addresses and registers: Address Value Register Value 0x100 0xFF %eax 0x100 0x104 0xAB %ecx 0x1 0x108 0x13 …
ShadyBears
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68k assembly - plus symbol on address registers

While reverse engineering something for fun, I came across the following piece of assembly: move.b (a1)+,(a0)+ I understand that the parentheses mean 'value of', but what does the plus symbol stand for? How would I accurately translate this to C?
Daniel Sloof
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Register addressing mode vs Direct addressing mode

I encountered this question in a test paper. It stated, Which of the given addressing modes is faster? Why? Register addressing mode Direct addressing mode Now according to me register addressing mode should be faster as register is the fastest…
user379888
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How to read/pronounce a MIPS load-byte instruction in English?

In MIPS instruction set, we have instructions like "LB R1, 0(R2)", which means "load one byte from the memory address whose base address is stored in R2 register and plus an offset of 0, load this byte to register R1". I am not an English native…
user19470144
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Efficient multiple indirection in 6502 code

Issue I'm looking at a 6502 program that has multiple arrays of bytes (sound effect data corresponding to a particular voice), which are of varying lengths. Currently this involves explicitly iterating through the first (if queued), then the second…
msbit
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