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I noticed that in ARM assembly, there are 3 types (that I known of, there are maybe even more) of load/store commands. So far I've seen:

    STR R0, [R1, #4]

    STR R0, [R1], #4

    LDR R0, R1, #4

These are just examples of the commands I've seen. Notice how the last command is load and not store, that is because I haven't seen STR R0, R1, #4 yet, so I don't know if writing that would compile.

I know that #4 means increment R1 by 4 (probably), but what are the differences with the [] in the above commands?

Peter Cordes
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Leonz
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    Start with any basic ARM assembly guide or search for "ARM addressing modes" or similar; there's like 30 years worth of reference material on this already. Any reasonable assembler would reject that third line as invalid syntax (because it is). – Notlikethat Jun 08 '16 at 15:08
  • Tyvm, will start searching that. Didn't know where to start. The thing is, I use a "custom" assembler made by our uni and a colleague of mine has written that Third type of command so I think it would compile in this assembler, but it's best if I don't use that since it would become a bad habit. – Leonz Jun 08 '16 at 15:14
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    The square brackets are basically syntactic sugar. The load and store instruction are the only ones that have memory operands and they always take memory operands so there wouldn't be an ambiguity if the assembly language didn't have them. I'm guessing your assembler takes a short cut and simply ignores the square brackets. But, yes, it wouldn't be a good idea to take advantage of this "feature". – Ross Ridge Jun 08 '16 at 15:46
  • @Ross _"there wouldn't be an ambiguity if the assembly language didn't have them"_ - so is that bracketless `ldr` pre-indexed or post-indexed, then? ;) – Notlikethat Jun 08 '16 at 18:50
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    @Notlikethat Yah, there would an ambiguity between offset addressing and post-index addressing without the square braces. Pre-indexed addressing has the `!` character that would disambiguate itself. – Ross Ridge Jun 08 '16 at 19:58
  • @Ross Bah, schoolboy error! OK, I guess we're even now :D – Notlikethat Jun 08 '16 at 20:07

1 Answers1

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The first one is preindexed: the offset is added to the base before doing the operation:

STR r0, [r1, #4]

Means that the store is done at address r1+0x4

Note that pre-indexed + write-back exists. This operation will do the same store operation, but the base address will be updated to the address. So at the end R1 = R1 + 4.

STR r0, [r1, #4]!

The other one is post-indexed, which always means write-back:

STR r0, [r1], #4

In this case, the store operation uses address r1 (Without offset), but the base register is updated to be R1 = R1 + 0x4 after the store.

For some instructions, you can use an offset which is a register, sometimes with a shift. For example:

STR r0, [r1, r2] ; Store at address r1 + r2
STR r0, [r1, r2 LSL #2] ; Store at address r1 + r2 x 4

Not all load/store instructions can have all the addressing modes.

Dric512
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    Just to clarify, the base register (e.g. `r1`) will not change when pre-indexing is used, UNLESS the writeback instruction is called. A writeback can be done by adding `!` to the end of the pre-indexed address e.g. `STR r0, [r1, #4]!` – BenLewis Nov 18 '19 at 18:39