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Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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overflow error in the program for performing 16bit addition

.model small .stack 200 .data arr dw 1234h,4321h,1dup(?) .code start: mov ax,@data mov ds,ax xor ax,ax lea si,arr mov ax,[si] mov bx,[si+2] add ax,bx mov [si+4],ax int 03h end start error is : (4)overflow! -cannot be evaluated: arr dw…
Rishi Reddy
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Error with display in eXist-db using XPath with XQuery

I'm trying to show only the belows elements of a node by name. In Xpath here is my statment: //akweny[parent::akwen/nazwa="Atlantycki"] And here is my XML file …
Brieg
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Impossible to encode 32-bit binary opcode in machine instruction

I have been trying to format binary opcodes for Motorola 68000, but I keep finding that it's not possible to encode both the destination memory address, instruction designation and addressing mode/size, and data value to be copied to the address bus…
Baby Wonder
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Correct use of scale value in indirect addressing

If I have to translate a simple C function with some kind of addressing like this: void f(int *a, int *b, long i){ a[i] = b[i]; } in System V AMD X86-64 (AT&T standard) assembly, using indirect addressing with index, base register plus a scale…
Fabio Carello
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assembly code:understanding the lea command

I found this code: lea 0x10(%edi),%esi mov %esi,0x4(%edi) but I really don't understand this combination. what is exactly happens on the stack on the lea-command. is it not easier just to write: mov 0x10(%edi),0x4(edi%) ?
Muten Roshi
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Illegal Memory Reference

I'm a beginner in the Assembly Language trying to Implement STRCPY My Assembler "TASM" returns an " Illegal Memory Reference" Error.. and tried to read about the error but couldn't find anything. Here's ma Code. include inout.asm .Model…
geekybedouin
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Based addressing mode assembly x86

I am taking my first assembly programming class and my instructor wants us to find out how based addressing mode works. So here is some code that I wrote to try and do that. Only problem is that I must not understand it because I keep getting a…
user2103164
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Assembly Addressing mode

This is the code: section .data v dw 4, 6, 8, 12 len equ 4 section .text global main main: mov eax, 0 ;this is i mov ebx, 0 ;this is j cycle: cmp eax, 2 ;i < len/2 jge exit mov ebx, 0 jmp inner_cycle continue: inc…
AR89
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Loop over function args on the stack, using a register as an index for ESP?

Just a short question. Anyone knows if there is any way that I can do this in assembly? movl $4, %ebx movl (%ebx)(%esp), %eax what I'm trying to do is basically create a loop that extras the next argument(fixed size) from the stack. example: int…
rlhh
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Masm32 - Addressing modes and arrays

I am a bit confused by addressing modes. array1 DWORD 200 DUP(?) If i have this statement: mov EAX, [EBX + EDI + 10] EBX is the base, EDI is the index, and + 10 is saying add ten more bytes to EDI? so, EDI would then return 14 bytes long? and…
user249375
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NASM macro-deal with any addressing mode

Write a NASM macro: divide, which has 2 arguments, which specify unsigned integers in any addressing mode. The macro computes the ceiling of its first argument, divided by its second argument, and places the result in register edx. If the second…
user1462787
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What does mov eax, [ebx+ecx*4] mean in NASM?

I just start learning Assembly and got confused by the following expressions. mov ebx, 2 mov ecx, 3 mov eax, [ebx+ecx*4] From what address the data will be moved to eax? And I don`t understand what is result of the computation of addresses in…
Znatz
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Access to operands and operations from IA32 in Linux

I'm getting a bit confused with this homework i have to do for college, i understand what a register is, why to put some bytes in the memory or in the register, but would be a great help to give me a push on this first exercise: (Gnu assembly): |…
Souza
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Confusion about addressing modes - how does a register by itself outside () work as an ADDRESS_OR_OFFSET constant?

In Programming from the Ground Up, in chapter 3 I read The general form of memory address references is this: ADDRESS_OR_OFFSET(%BASE_OR_OFFSET, %INDEX, MULTIPLIER) All fields are optional. To calculate the address, simply perform the following…
Enlico
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Why can't I use both SI and DI or BX and BP registers with indirect addresing in 8086?

I understand that they are the only registers you can use with indirect addressing, but I couldn't find an explanation to why I can't use those pairs simultaneously. Why can't the machine support an addressing mode like [si+di]?
dawidmucha
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