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Questions tagged [zynq]

Zynq refers to the Zynq-7000 family of SoCs. A Zync device is a fully featured ARM processor-based system-on-chip.

Zynq refers to Zynq-7000 All Programmable SoCs which are based on the Xilinx All programmable SoC architecture. They enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability.

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Using Zynq, how to use one of the available DMAs in the Embedded Linux running on A53s

I’m using a Zynq board with 4 A-53 arm cores that run an embedded Linux (Ubuntu). I need to use a DMA to do a data transfer. When the Linux comes up, I see the following messages that show some DMAs are available: In the device tree, I found the…
Siavash
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Zynq + Microblaze share DDR memory via smart interconnect

I have a block design with a Zynq and Microblaze on an Xilinx Zed board. I want the microblaze to be able to access DDR memory shared with the arm corers in the PS. My microblaze uses a cache. There are two AXI ports on the microblaze M_AXI_DC,…
dwjbosman
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"File format not recognized" when building Petalinux app

I am using Petalinux 2017.2 and the included tools to build a Linux image for a Zynq ZC702 board. I am trying to add a pre-compiled executable to my rootfs with a bitbake recipe. SUMMARY = "Demo on ARM-Linux" SECTION = "PETALINUX/apps" LICENSE =…
superb owl
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Using physical address as sk_buff data fragment

Is it possible to map physical address as data fragment in sk_buff? I am working on Zynq Ultrascale+ platform (FPGA + ARM SOC). I have memory buffer mapped to physical address. The goal is to efficiently send that data over UDP. By efficiently I…
modimo
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Zynq Linux Kernel Load address

I want to build linux for zed board. When I look into zynq-common.h file in u-boot/include/configs directory, I see that kernel_load_address is 0x02080000. Why kernel load address is 0x02080000? What is the logic of it? I am using version 2018.01.…
overlord
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Generation of an image of the Ubuntu running from the SD card

I have a ZYNQ running ubuntu on one of the processors (and baremetal code running on the other one). Everything is currently (and temporarily) running from the SD card, so that it has two partitions, one called BOOT (containing the files BOOT.BIN,…
wuampa
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Zinc-7000 returns unread bytes of information to UART

I have a ZC702 Evaluation Kit with a Zynq-7000 processor. I need to transfer the array of information from the PC to the board via the "USB UART" connector, process it, and give a response to the PC. The ZC702 Evaluation Kit is loaded from the SD…
Sergey Kolybelnikov
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How do I increase the Heap Size for FreeRTOS in Zynq702 SoC?

I am using Zynq 702 SoC. It has 2 CPU's. CPU0 is loaded with Petalinux and Cpu1 with FreeRtos and my FreeRtos current heap Size is 6MB. The actual size of the RAM is 1GB, in this 512MB being set in the Petalinux Kernel and rest is not used and want…
Pranay Gupta
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Userspace Serial communication Library on Linux

I need to develop a (userspace) library to handle serial communication on Linux (on Zynq-Zybo Board: UART, SPI, I2C). I explored various websites and stuff, and investigated the xilinx-linux kernel, as well as some references on O'Reilly Linux…
aldoalpha
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data transfer from PL(fpga) to the PC via ethernet

I work with Zedboard and vivado v2017.3. I have a custom IP in the PL part of zynq generating 32 bit values and stores them in one of the registers, say slv_reg0 (address : 0x43c00000). In the PS part I read this register and I can print it in the…
upasana
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PCI Interrupt Not Assigned

The legacy interrupt assignment for a PCI interface is receiving interrupt 0. We are evaluating the Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit. We have a PMC interface that is on a PCI-e carrier inserted into the PCI-e slot on the…
Bill Door
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Is it possible to build dumpimage from u-boot for arm .?

I am trying to extract a FIT image created by mkimage on an ARM board. Usually when we build u-boot, mkimage and dumpimage are built for the host. I would instead like to cross-compile and install in a ramfs. Is there any method to do this? Rewrite…
pritam
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Direct connection FIFO to Zynq ARM

First of all I'm new in developing projects for FPGA WITH embedded ARM (or MicroBlaze) cores. My first project used transmitting a number of data to PS through FIFO. The main problem - I can't use DMA (it's blocked for other needs). As result I just…
Nikolay Josh Konovalenko
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How to adapt buildroot for a custom Zynq FPGA bitstream

I am using buildroot 2017.02 for a MicroZed board target with a Xilinx kernel and U-Boot. The Zynq programmable logic (PL) bit stream file will be custom built by me using Vivado. The PL must be incorporated to the boot.bin file that resides on…
edj
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Bring back CPU in WFE mode after a soft reset (cortexa9)

I'm working with a zynq SoC. It contains 2 CPUs cortex-a9. My goal is to work with AMP (asymetric multiprocessing), be able to apply soft reset from one CPU to another, and then restart the CPU when it is suitable. According to the zynq…
Yohboy
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