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Questions tagged [zynq]

Zynq refers to the Zynq-7000 family of SoCs. A Zync device is a fully featured ARM processor-based system-on-chip.

Zynq refers to Zynq-7000 All Programmable SoCs which are based on the Xilinx All programmable SoC architecture. They enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability.

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Why am I not able to write to/read from custom AXI lite peripheral's registers

I am working with a Zynq board where a custom AXI 4 lite slave peripheral is created and then added from the IP Repository. Then these blocks have been successfully connected with Run Connection Automation. Then bit stream was generated…
atnd
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How to add another target to make for buildroot (i.e. custom FSBL, or bistream from Vivado project)?

Is there a possibility to add another targets for buildroot to make, apart from rootfs, Linux kernel image, and Uboot? In my use case I want to build boot image for Zynq, which consists of FSBL, bitstream for FPGA part of Zynq, Uboot, Linux kernel,…
Staszek
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Issues using custom HLS block under Linux, despite a validated bare-metal design

I have written an RSA encryption block in HLS (Using Vivado 2017.2), and am trying to exercise it under Linux on the zedboard (Zynq 7020). I have verified that the hardware works, and have a fully-functioning bare-metal software interface to the…
asmvolatile
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Suspend operation of lwIP Raw API

I am working on a project using a Zynq (Picozed devboard). The application is run bare-metal, uses lwIP TCP in RAW mode and basically behaves like this: Receive a batch of data via Ethernet, which is stored in RAM. Process the batch of data. Send…
Christoph O.
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Issues cross compile opencv 2.4.11 for ARM on x86_64 host

I've been trying to cross compile opencv for an ARM target system. My project is dependent to use opencv 2.4.11. The target system is a petalinux 2017.2 running on a quad-core Cortex A53 of a Zynq Ultrascale+ FPGA. My host system is an Ubuntu 16.04…
Benjamin Hülsen
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PS-PL GPIO Interrupt using FreeRTOS

I am working on CORTEX-A9 FreeRTOS port using ZEDBoard. I want to take PS-GPIO interrupt. But I am facing following issues here.. When an interrupt occur, GPIO handler calls two times... When I set interrupt on rising or falling edge, Corresponding…
User9211
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It possible to boot freertos over network?

some words to my system. Im work on the Xilinx development-board zc706. The basic example of freertos are running. Now the question is: How i can boot the application over network? A freertos application is a bare-metal approach. Typically a loader…
AndreStony
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How to run synthesized VHDL code on Xilinx Zynq-7000 All Programmable SoC ZC702 Evaluation Kit (FPGA SDSoC)

In my work I have to prove that the synthesized C++ visual algorithm code in VHDL (made via Vivado HLS) running on FPGA part on Zynq702 from Xilinx is quicker then classic C++ code on conventional CPU. The main problem witch I am not able to…
AdriankaBeno
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Determining Interrupt index in Linux kernel 4+

I have an interrupt connected to the GIC of an ARM processor in a Xilinx Zynq-7000. Previously, the recommended way to use an interrupt in Linux would be to use request_irq(INTERRUPT_INDEX,interrupt_handler,0,DEVICE_NAME,DEVICE_ID); where…
Zephyr
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Using Eigen C++ library on ARM Zynq ( baremetal )

After failing to cross compile GNU Scientific library for Zynq baremetal ( Cross compile GNU Scientific Library for ARM Zynq ( baremetal ) ), I tried to use Eigen C++ instead. So i download it then unzip it and include it's header like…
h-sh-h
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install OpenCL ICD Loader to ubuntu12 on Zedboard occured error

i want to run opencl on zedboard and now i'm failing to install ocl_icd on ubuntu12 i refer to the page "https://github.com/umaurmi/OPENCL_EXAMPLES_ZEDBOARD/wiki/Installing-POCL-dependencies-on-Ubuntu-linux-based-targets" "./configure" complete…
ziteng
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Best way to configure root file system in an embedded linux environment

I am developing scripts for my embedded board ( a zynq board) and I need some scripts to be loaded prior to login. Since the filesystem is loaded into DDR memory, any modifications will be erased after a reboot. So for my development, I have to…
maskarih
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Python app on widows to LwIP echo server on Zynq fails if socket closed and new one opened

I have a python application running on a win7 pc. It connects to a TCP/IP "echo" server running as a bare metal application on a Zynq (Arm core 0). The python application comes up, opens a socket and exchanges data with the echo application (which…
user3145004
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Manage custom IP devices connected with AXI in a Zybo under linux OS

I followed the xilinx wiki about linux drivers (Linux-GPIO-Driver) in order to control GPIO connected to the PS throught the MIO and EMIO pins. Then I added some basic peripherals to the PL connected to the PS by AXI buses. This is my design: This…
Arturete
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How to send data in real time using freertos

I’m really new on the coding world and I need your help. I need to do the following: In a Zedboard platform I take data from a USB port and want to make real time packets and send them via TCP. I have establish FreeRTOS for that. I take the data…
lafe
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