Questions tagged [zynq]

Zynq refers to the Zynq-7000 family of SoCs. A Zync device is a fully featured ARM processor-based system-on-chip.

Zynq refers to Zynq-7000 All Programmable SoCs which are based on the Xilinx All programmable SoC architecture. They enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability.

262 questions
2
votes
0 answers

Boot fail on zynq ultrascale+ mpsoc zu3eg on the ULTRA 96

I followed this tutorial to boot the ULTRA 96 : https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841783/Building+Xen+Hypervisor+with+Petalinux+2018.1 I'm using petalinux-v2018.2-final and xilinx-ultra96-reva-v2018.2-final.bsp I built the…
2
votes
2 answers

Read Write to Memory space

I am trying to write a Signed Double number to memory and read back the same, reading back is redundant as it is just to verify if the correct data is in the memory before I trigger the PL (programmable logic) FPGA Fabric to access this data and…
Harry
  • 33
  • 5
2
votes
1 answer

Cannot compile Qt Charts for Embedded Linux in Zynq

I had an application written in Qt5.12.2, which uses QCharts to plot some signals. I want this application to run in a Zynq based board, specifically in the Zybo board from Xilinx. However, the provided information for Xilinx covers only Qt version…
2
votes
1 answer

Bazel cross compile of tensorflow for ARM fails

I am trying to build tensorflow to run on a Zynq, specifically, the Z7020. I have petalinux running on the board, and python 3.4.9. When trying to build tensorflow following the instructions found…
R. Klein
  • 58
  • 6
2
votes
1 answer

AHB AP transaction error with zynq board

I'm new at zynq board. I am trying to work with XADC of zynq-xc7z020 and want to see its quality for my application through vivado and xilinx SDK. I tested two ways of designing through lab3 and lab4 tutorials. Synthesis, implementation and…
Mojtaba Ahmadi
  • 1,044
  • 19
  • 38
2
votes
0 answers

ARM Cortex-A9 Preload and Lock Code in L2 Cache

I've been studying and experimenting with the caches on an ARM Cortex-A9, namely a Zynq SoC, for the past week with the main objective of loading and locking part of my code to L2 (PL310). The steps I take to achieve this are: Set TTBR0 and…
josecm
  • 413
  • 3
  • 15
2
votes
1 answer

mmap EINVAL error on UIO device

I have trouble mapping physical memory on Xilinx Zynq after attempting to use UIO instead of mapping directly /dev/mem. While the plan is to run the application as a normal user instead of root this is still being run as root. Apparently the first…
2
votes
1 answer

SysFs interface. I can't export gpio pins in a Xilinx's Board (Zybo and other)

Using a linux-kernel compiled as it is described here, I'm trying to make a led blinking following this wiki: Linux GPIO Driver. I'm working with a Zybo-board of Xilinx. I enabled the kernel…
Arturete
  • 133
  • 2
  • 12
2
votes
1 answer

Simple framebuffer in device-tree

I have been trying to setup simple framebuffer on a device, and I am having problems with the device tree. Currently I have it setup pretty much as it is in the documentation: chosen { #address-cells = <1>; #size-cells = <1>; …
sivu
  • 23
  • 1
  • 5
2
votes
1 answer

How does addressing work in devicetree for a Xilinx CDMA?

Background: What I want to do is to be able to write from my ARM processor to a BRAM, on a Zynq 7000. To do this, I have the following components: -M_AXI_GP0 on PS7 connects to S_AXI_LITE on axi_cdma_0 through an AXI Interconnect -cdma_introut on…
Zephyr
  • 337
  • 5
  • 23
2
votes
2 answers

Qualitative comparison between Petalinux and FreeRTOS

I'm going to start the development of an application on a Zynq board. My task is basically to port an existing application running on a Microblaze on the dual core ARM. What I'm wondering about is which O.S. to use on the new system, because I have…
arandomuser
  • 521
  • 1
  • 7
  • 22
2
votes
1 answer

Unknown Error during synthesis of AXI IPs

I am attempting to use the IP packaging tools in Xilinx Vivado to create a co-processor with an AXI-Lite interface and utilize it in a Zynq SoC design for my Digital Systems Engineering class. The co-processor is a GCD calculator that we have…
Unrealcow
  • 41
  • 1
  • 4
2
votes
1 answer

cannot access /dev/video*: No such file or directory

So I'm working on a zynq z7000 card and I made a Linux Kernel on it. I put a Linaro as a Root File System. I managed to boot the card however I can only use mouse and keyboard usb devices. I tried webcam and flash drives but they are not working.…
user6099747
  • 35
  • 1
  • 1
  • 6
2
votes
2 answers

Kernel panic - not syncing: No working init found

I'm trying to work a Linaro Ubuntu desktop on a zynq 7000 through an SD Card. After making the two partitions on the SD card and inserting in the FPGA, I get this message on my host PC (linked to the card through a serial port using UART) : EXT4-fs…
user3742053
  • 83
  • 1
  • 1
  • 10
2
votes
1 answer

Zynq7 / Zedboard: Xil_in32 alters data when reading from DRAM

I have a Zedboard with the following setup in the PL (FPGA): Custom AXI (full) master -> Interconnect -> Zynq_PS (HP0 slave port) The custom AXI master produces data (simple counter, written to DRAM, starting at 0x00000000). The data are written to…
Martin G
  • 268
  • 1
  • 3
  • 20
1 2
3
17 18