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First of all I'm new in developing projects for FPGA WITH embedded ARM (or MicroBlaze) cores. My first project used transmitting a number of data to PS through FIFO. The main problem - I can't use DMA (it's blocked for other needs). As result I just connect few FIFO and Register to Zynq PS through AXI Interconnect. The main question: How I can read data from FIFO using xilinx SDK?

Block Design picture

Other question: is there any other options connect data to PS without DMA

Nikolay Josh Konovalenko
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  • The AXI FIFO generator basically generates a FIFO instance for all the signals in the AXI protocol. Something like a pipeline. It is not an addressable space. Is this what you need? – Vinay Madapura Apr 11 '18 at 11:22
  • I understand that, but I need receive data from FIFO. No matter how, just read and use it in project. Like stream or variable etc. How can I do that by functions? – Nikolay Josh Konovalenko Apr 11 '18 at 13:09
  • on zynq device you can use interlan dma of the ps or you can use different dma on the pl at the same time!!!! – Leos313 May 15 '18 at 22:45

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