Questions tagged [instruction-set]

Use for questions related to Instruction Set Architectures, ISA. For questions related to the inner workings of a CPU, use [cpu-architecture] instead.

An instruction set is a specification for a set of machine-readable instructions, or CPU instructions. An instruction set exists for all processing units including Graphics Processing Cores, Networking Card Processors as well at the CPU. The phrase "Instruction Set" usually implies the CPU type.

Each digital logic process which a processor can perform has an binary instruction code which caused the CPU to execute that exact instruction. An assembly language translates mnemonics into instruction codes. Instruction codes are likely to differ between different processor architectures. For example, the x86_64 instruction set for Intel CPU's includes additional 64 bit instructions (among others) for manipulating data 64 bits wide inside the CPU's core, which is an extension to the x86 32 bit capabilities of previous Intel CPU generations.

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How 32 bit IR hold load instruction?(RISC style 32bit architechture)

I am bit confused with instruction size and addressable space (I assumed that instruction size should be same as size of address bits. I did not find enough explanation in my book)If I am correct, then in theory if we have a 2^32 addressable…
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Compiler macro to detect BMI2 instruction set

I was searching on the web to find a proper solution, without much success. So I hope one of you know something about it: Is there any way to detect the "Intel Bit Manipulation Instruction Sets 2" (BMI2) compile time? I want to make some conditional…
plasmacel
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How can I get the number of instructions executed by a program?

I have written and cross compiled a small c++ program, and I could run it in an ARM or a PC. Since ARM and a PC have different instruction set architectures, I wanna to compare them. Is that possible for me to get the number of executed instructions…
Cong Wang
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Why does ARM distinguish between SDIV and UDIV but not with ADD, SUB and MUL?

As stated in the title, why does the ARM instruction set distinguish between signed and unsigned only on division? SDIV and UDIV are available but that's not the case with ADD, SUB and MUL.
JohnnyFromBF
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Where to get all versions of x86 aka IA32 Instruction Set Architecture manuals

I know about Intel 64 and IA-32 Architectures Software Developer's Manuals. I also know that these cover all the legacy & old processor ISAs. But I want the individual manual (the one that released along with the processor) for each of the…
claws
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Why does the 80x87 instruction set use a "stack-based" design?

Back when Intel first designed the 8087, why did they choose to organize the floating-point registers as a stack? What possible advantage could be gained from such a design? It seems much less flexible and harder to work with than allowing arbitrary…
Alex D
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Encoding a CALL instruction to call a function

I am trying to create an assembler which is able to encode instructions at runtime (for a JIT compiler). Sorry for the long code snippet, but this is the shortest compilable example which shows my problem. #include #include…
maxdev
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What instruction set does the Nvidia GeForce 6xx Series use?

Does the GeForce 6xx Series GPUS use RISC, CISC or VLIW style instructions? In one source, at http://www.motherboardpoint.com/risc-cisc-t241234.html someone said "GPUs are probably closer to VLIW than to RISC or CISC". In another source, at…
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x86 function call types

I'm new in x86. My question is about function calls. As far as i know there is three function call types: short call (0xe8), far call (0x9a) and near call (0x??). Some call short call a relative call (ip += arg / cs = inv) and far call an absolute…
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change instruction set in GCC

I want to test some architecture changes on an already existing architecture (x86) using simulators. However to properly test them and run benchmarks, I might have to make some changes to the instruction set, Is there a way to add these changes to…
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Where can I find a list of x86_64 assembly instructions?

Here is a link to a complete (I think) list of NASM instructions, which I presume also covers the x64 bit instruction set for Intel processors. However, I was hoping there would be a complete list of instructions somewhere, and just that, without…
FreelanceConsultant
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Disassembling an 'faddl' instruction

In my venture of coding a disassembler for the 32-bit Linux on x86 platform, I came across an issue. I saw the following opcode sequence when I disassembled a simple ELF-32 executable using objdump: dc 82 04 08 0d 00 faddl 0xd0804(%edx) But…
Hrishikesh Murali
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How to write a compiler back-end to generate assembly for user defined hw architecture, from C code

I am working on a project where I have to define a new processor hardware architecture. I need a compiler to generate assembly code for this target (it has its own instruction set). Programs for this processor will be written in C. My idea to do…
Vincenzo Pii
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What does the AMD64 machine code "48 ff 25" mean?

Could anyone tell me what does "0x48ff25" means in the following disassamble code? 00000000`7745b0ac 48ff2525801000 jmp qword ptr [ntdll!NlsAnsiCodePage+0xe3e (00000000`775630d8)] I have checked the AMD64 architecture programmer's manual, but…
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Assembler instructions bne and br (NIOS II). How is their offset calculated?

I have this assembler code, which I'm supposed to translate into machine code in binary form: .text .align 2 .global main .equ val,0x4712 main: movi r16,val movi…
keyser
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