Questions tagged [fsm]

Acronym for Finite State Machine.

Finite state machine, finite state automata, or state machine, is used in computer science or logic theory to represent a finite number of states and the transitions between states.

Finite state machines are commonly used in parsing and matching strings, so it accepts certain types of strings (such as those representing an integer), and a language (set of strings) is regular if and only if it can be represented as a finite state machine.

An example of a finite state machine implementation in pseudocode, accepting all decimal integers:

state = 0;
digits = "152341264"; // Some sequence of decimal digits
for (k = 0; k < len(digits); k++) {
    switch (state) {
    case 0: // Initial state
        if (digits[k] is a decimal digit)
            state = 1;
        else
            state = 2;
        break;
    case 1: // Digit found, also an accepting state
        if (digits[k] is a decimal digit)
            state = 1;
        else
            state = 2;
        break;
    case 2: // Dead state
        break;
    }
}
FSM accepts the string digits if it finishes at state 1.

Finite state machines represent all the regular languages, or Type 3 languages, which are the lowest in the Chomsky hierarchy, below the context-free (Type 2) languages, which is below the context-sensitive (Type 1) languages, which is below the recursively enumerable (Type 0) languages.

Wikipedia page

The tag is also known like on stackoverflow.

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Removing JPanel from a JPanel

I have a State Manager for a game that contains a stack of States. Now in one of my states ("Menu"), I have two JButtons in a JPanel (the JPanel is added to the main JPanel that displays everything). When I click the JButton "Play", I remove the…
helsont
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how to correct a slightly incorrect DFA, for a given correct input string?

I wrote a program which can generate DFAs. But the DFAs are slightly incorrect. That is, sometimes they can't accept the correct strings. My question is: is there any algorithm can correct the DFAs, so that they can accept the given correct…
JackWM
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Can i count the number of digits in a string with FSM?

I want to count the number of digits in a string which can include non digits(aa11aa1a). Can i solve this problem with a Finite State Machine? Can this problem be represented as regular expression? What if i want to know whether the count is "X" or…
mert inan
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How to create Finite State Machine In Java

How to write a program that will read the set of states of FSM. The input data will be from text file with the format (state input next-state) and the last line is final state. for example : s0 a s1 s1 a s2 s2 a s2 s1…
akmal elias
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Pseudocode for sink accessing wireless medium into Finite State Machine

This pseudocode is for a sink that tries to access the wireless medium in send and receive data from sensors. set pc = 0.01 send a polling packet If no sensor responds to polling packet, set pc = min (pc + 0.01, 1.0) If a data packet is…
ndaisy
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Different Clock Domain VHDL

I'm making a custom hardware ARINC 429 Core. For now I have described the module in transmission (TX-FSM), according to the ARINC 429 standard and a FIFO in transmission from which it takes the data and sends them to the outside. The FIFO works at a…
KemKing
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How do I correctly implement a Finite-State Machine into VHDL without taking in multiple inputs from Basysy3 FPGA

I am new to VHDL and I am attempting to implement the following state machine into VHDL (state diagram provided below). When I press a button on my Basys3 FPGA board( P input) the output is a random state. I suspect this is because the clock is…
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How to reuse States in Sparx EA

How would I go about re-using states in Sparx EA State Machine Diagrams? For my application I have a defined list of States (StateA,StateB,StateC, etc) but different objects may transition between them in different manners, i.e. ObjectA: StateA--(no…
David Gitz
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How to run function from another python file

I have a.py : Class boxfinitestatemachine(models): ..... @transistion... def hello(self): Print happy .... @transostion.. def bye(self): Print sad .... Normally this would get…
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Should I use FSM for a FIFO buffer ? ( VHDL )

I am trying to implement a FIFO buffer with 4 positions . I have tried an implementation using the concept of FSM . The diagram consists of 5 states : Empty , Write , Read , Full , Wait(to avoid some race conditions). It turned out to be harder…
Atheros
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How to make an event driven architecture which uses Finite State Machine workflows and windows services, cloud enabled?

I have an existing legacy application which is now having an event driven architecture. It adopts FSM workflows and calling windows services. I am looking for a technology solution to make it cloud enabled.
Jithu
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Problem with my VHDL finite state machine

I'm trying to make a state machine that detects a high bit or low bit and send it to the next addressed state. For some reason, it seems that my FSM is stuck on state detect or something is making the FSM reset constantly. When I look in the Synth…
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VHDL FSM multi-driven net Q is connected to constant driver, other driver is ignored, what's wrong with my code?

This code is a FSM which is a Moore Machine Alyssa P. Hacker has a snail that crawls down a paper tape with 1’s and 0’s on it. The snail smiles whenever the last two digits it has crawled over are 01. Design Moore and Mealy FSMs of the snail’s…
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32-bit Divider in Verilog with Finite State Machine Control

I am trying to implement a 32-bit divider in Verilog and I am having issues. A and B are the numbers to be divided. Here is my code so far. The output of the testbench is: What am I doing wrong? Also, what does it mean when the output is both Hi…
Dimitris S
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Python - Making a function to check whether a given query string, is accepted by the given FSM

I have to implement a function that checks if a query string is accepted by the FSM (Finite State Automata) down below I have already made a small design that basically retrieves all the data which is needed to work with. I still need to implement…