Questions tagged [fsm]

Acronym for Finite State Machine.

Finite state machine, finite state automata, or state machine, is used in computer science or logic theory to represent a finite number of states and the transitions between states.

Finite state machines are commonly used in parsing and matching strings, so it accepts certain types of strings (such as those representing an integer), and a language (set of strings) is regular if and only if it can be represented as a finite state machine.

An example of a finite state machine implementation in pseudocode, accepting all decimal integers:

state = 0;
digits = "152341264"; // Some sequence of decimal digits
for (k = 0; k < len(digits); k++) {
    switch (state) {
    case 0: // Initial state
        if (digits[k] is a decimal digit)
            state = 1;
        else
            state = 2;
        break;
    case 1: // Digit found, also an accepting state
        if (digits[k] is a decimal digit)
            state = 1;
        else
            state = 2;
        break;
    case 2: // Dead state
        break;
    }
}
FSM accepts the string digits if it finishes at state 1.

Finite state machines represent all the regular languages, or Type 3 languages, which are the lowest in the Chomsky hierarchy, below the context-free (Type 2) languages, which is below the context-sensitive (Type 1) languages, which is below the recursively enumerable (Type 0) languages.

Wikipedia page

The tag is also known like on stackoverflow.

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How to represent that an Akka actor is in a long running operation using FSM-s

My actor that is described with an FSM is waiting for a trigger (in Idle state). When it gets it it starts processing some data (and goes to Running state) and when it is done it goes back to Idle state. If I understand the FSM model correctly, from…
Sandor Murakozi
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Akka FSM: send msg to self in future on transition to next state

I am using an Akka FSM actor. A simplified version of my actor has two states: Idle and Processing. The actor receives a msg containing data, causing it to transition from Idle to Processing. The onTransition function kicks off a long running…
mushroom
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How to construct akka TestFSMRef with parameters?

I am trying to test an Akka FSM using the information provided here. However I cannot figure out how to create a TestFSMRef when my subclass of Actor with FSM requires parameters for instantiation. For standard, non-FSM tests, I create the…
yotommy
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Assertion, Exception, run time error, or Undefined Behaviour?

I am working on a finite state machine library, with these public methods: template void add_state(); // allocate STATE_T on heap - STATE_T must derive from state template
Igneous01
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JountJS - Creating FSM Dynamically through PHP

I'm using JointJS for creating state diagram. I am creating FSM Dynamically through PHP. is there any way to lay the states automatically apart from each other without specifying vertices.Also the link should be made curvy without specificity x n y.…
Rajendra
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periodic state machine with boost statechart

I want to implement a state machine that will periodically monitor some status data (the status of my system) and react to it. This seems to be something quite basic for a state machine (I've had this problem many times before), but I could not find…
brice rebsamen
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Advantages of FSM (Finite State Machine) over SOA?

Can anyone tell me if there are any significant relative advantages of using FSM (Finite State Machine) over SOA (BPEL) for designing a workflow ? or does SOA has more advantages?
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VHDL FSM set unit input and use output in same state

I am implementing a Mealy-type FSM in vhdl. I currently am using double process, although i've just read a single-process might be neater. Consider that a parameter of your answer. The short version of the question is: May I have a state, inside of…
user1058795
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C# storing generics state

public abstract class State { public virtual Enter(T item) { // an empty method } } public class ChaseState : State { public override Enter(Player pl) { // ... pl.Fsm.CurrentState =…
Orvel
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How to Build finite state machine that show modulus 4 in binary

Can someone show me how to build a finite state machine that shows modulus 4 in binary?
user185201
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VHDL: Create finite state machine from logic expressions

I've been asked to create a finite state machine using one-hot encoding that will detect a sequence of four 1's or 0's on the input w. I've already written the code using case statements, but I have to also have to do it by providing the logic…
user2113607
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How to build FSM when there are too many states?

I am working on a vending machine project and trying to build a state machine, as I saw from other examples. The machine that I am trying to build holds up to 100 dollars. And it takes nickel, dime and quarter. So, I should define about 2000 states…
user1594118
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VHDL FSM pattern checker

I'm trying to write some vhdl that detects a given pattern in a string of bits. The circuit should output 1 when it finds the pattern "110" in the input stream. My input is "X" and my output is "Z". I'm not sure how to check for an input pattern of…
codedude
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VHDL state machine is not looping

Fellow SO users, I'm programming my ADC (ADC0804 which is mounted on a breadboard connected to a Spartan-3 FPGA board). Now, I'm using this ADC to provide digital output for my humidity sensor. The ADC outputs an 8-bit value which I'm displaying on…
Triple777er
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Good Practice (for FSMs): BUSY or IDLE

Let's consider state machines in VHDL that sit in some idle state until they're triggered to work for a while and end up in idle state again. What is the better practice: Include an IDLE signal to the outside world to signal "I can do…
HWende
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