DO NOT USE. Use the specific ISA that your question relates to instead, e.g. [arm], [mips], [riscv], [avr] or [instruction-set] for questions about instruction sets in general.
RISC systems are typically load/store in nature, whereby all instructions operate only on registers or immediate values, rather than memory. In order to work against memory the data must be loaded into a register or written from a register using memory specific instructions.
Some well known examples of RISC CPUs are ARM, MIPS, PowerPC, RISC-V and SPARC.
