Questions tagged [pipelining]

In computing, a pipeline is a set of data processing elements connected in series, where the output of one element is the input of the next one.

In computing, a pipeline is a set of data processing elements connected in series, where the output of one element is the input of the next one. The elements of a pipeline are often executed in parallel or in time-sliced fashion; in that case, some amount of buffer storage is often inserted between elements.

Computer-related pipelines include:

  • Instruction pipelines, such as the classic RISC pipeline, which are used in central processing units (CPUs) to allow overlapping execution of multiple instructions with the same circuitry. The circuitry is usually divided up into stages, including instruction decoding, arithmetic, and register fetching stages, wherein each stage processes one instruction at a time.
  • Graphics pipelines, found in most graphics processing units (GPUs), which consist of multiple arithmetic units, or complete CPUs, that implement the various stages of common rendering operations (perspective projection, window clipping, color and light calculation, rendering, etc.).
  • Software pipelines, where commands can be written where the output of one operation is automatically fed to the next, following operation. The Unix system call pipe is a classic example of this concept, although other operating systems do support pipes as well.
  • HTTP pipelining, where multiple requests are sent without waiting for the result of the first request.

Source: Wikipedia

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jQuery Datatable Pipeline using server side - data not loading

I am working on jQuery datatable and trying to implement pipeline feature using server side processing. (following the code same as suggested in the below jQuery site) https://datatables.net/examples/server_side/pipeline.html Actual Scenario My…
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Can I implement Branch target buffer in two stage pipelined RISC architecture?

I am trying to implement the BTB in low-level microcontroller such as PIC16. I don't know is it feasible or not. So wanted your suggestion. Thanks.
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How can i use http 1.1 pipelining from a desktop Java application (J2SE)?

I'm making a simple Java app that makes 40 requests (each request has a unique URL) to a define server ... there is a simple way to make that 40 request with HTTP 1.1? I need to use only 1 tcp connection... Thanks in advance Diego
Cowboy
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Super-scaling vs Pipe-lining Performance

While a super-scalar CPU is typically also pipe-lined. Why pipe-lining and super-scalar execution are considered different performance enhancement techniques??
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What's the role of EX stage for branching in Pipelined MIPS w Forwarding?

Consider the following Pipelined Processor structure: Notice that the condition test for branching (the = circuit), as well as the target address calculation for the next instruction in case of branch taken are executed in the ID phase - as a way…
P. Lance
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What is the impact of locality principles on the pipelining techniques?

I know what are both locality principles and pipelining techniques. But I can't see any sort of interconnection between the two things. How can locality principles impact pipelining techniques?
emarkk
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Redis pipeline, dealing with cache misses

I'm trying to figure out the best way to implement Redis pipelining. We use redis as a cache on top of MySQL to store user data, product listings, etc. I'm using this as a starting point:…
StackOverflowed
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Handling data dependency in pipline

mov $10, %eax add $2, %eax mov $4, %ebx mov $5, %ecx add $1, %ebx add $1, %ecx add %ecx, %eax add %ebx, %eax If you have the above assembly, the general 5-stage pipeline would look something like the below but since there is a data dependence, the…
blor
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MIPS pipelining - How to fill pipelining timeline given ASM?

Assembly Code: lw R1, 0(R2) add R4, R3, R1 add R3, R1, R4 What are the dependencies? Fill the pipelining timeline if: a. There is forwarding b. There is no forwarding Instruction 1 and 2 have a dependency for R1. Instruction 2 and 3 have a…
John D
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How does instruction after Load, execute?

There are 5 stages in pipeline. IF - Instruction fetch ID - Instruction Decode, read the register EX - On a memeory reference add up base and offset, and for arithmetic instruction do the math. MEM - If load or store access…
Tushar
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Could a nop instruction ever take more than 5 cycles in the pipeline?

A nop instruction is defined as: sll $0,$0,0 Since $0 is a read-only register, could a nop ever be stalled in the 5-stage MIPS pipeline? That is, could it ever take more than 5 cycles to execute?
ineedahero
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Implementing pipelined I-cache access

I am trying to implement a pipelined cache access as an optimization technique to increase my cache bandwidth for my I-cache which is a L-1 cache. I need to do this in verilog. The cache size is 64 KB, and two-way associative with a block size of 4…
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branch stall in classic 5-stage pipeline

I'd appreciate, if anyone can answer my question regarding following exercise (not a homework, doing it for myself): draw a pipeline cycle timing diagram for the above code. Start with the first lw before the loop, run one loop iteration, and stop…
Bob
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late lhr / ghr update in long pipeline

I'm wondering if it is a viable scenario in long pipelines, when younger branch instruction is already processed by branch prediction mechanism, but corresponding lhr (or ghr, depending on implementation) still hasn't been updated with actual result…
Bob
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What is the minimal number of dependency chains to maximize the execution throughput?

Given a chain of instructions linked by true dependencies and repeated periodically (i.e. a loop), for example (a->b->c)->(a->b->c)->... Assuming that it can be split into several shorter and independent sub-dependency chains to benefit from…