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Questions tagged [instruction-set]

Use for questions related to Instruction Set Architectures, ISA. For questions related to the inner workings of a CPU, use [cpu-architecture] instead.

An instruction set is a specification for a set of machine-readable instructions, or CPU instructions. An instruction set exists for all processing units including Graphics Processing Cores, Networking Card Processors as well at the CPU. The phrase "Instruction Set" usually implies the CPU type.

Each digital logic process which a processor can perform has an binary instruction code which caused the CPU to execute that exact instruction. An assembly language translates mnemonics into instruction codes. Instruction codes are likely to differ between different processor architectures. For example, the x86_64 instruction set for Intel CPU's includes additional 64 bit instructions (among others) for manipulating data 64 bits wide inside the CPU's core, which is an extension to the x86 32 bit capabilities of previous Intel CPU generations.

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Determine instruction set of my processor under Linux

I would like to know how to know which instruction set my processor using; I am running Linux. I would also like to understand how a processor can handle many instruction sets. When I type cat /proc/cpuinfo, I get : model name : AMD FX(tm)-6350 Six…
DJ_Joe
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How do I enable SSE for my freestanding bootable code?

(This question was originally about the CVTSI2SD instruction and the fact that I thought it didn't work on the Pentium M CPU, but in fact it's because I'm using a custom OS and I need to manually enable SSE.) I have a Pentium M CPU and a custom OS…
anol
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How does a zero register improve performance?

In the MIPS ISA, there's a zero register ($r0) which always gives a value of zero. This allows the processor to: Any instruction which produces result that is to be discarded can direct its target to this register To be a source of 0 It is said in…
dayuloli
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Difference between ISA (e.g. MIPS) and Assembly language

What's the difference between an ISA (e.g., MIPS) and Assembly language? I'm seeing some contexts where they appear to be used synonymously.
George Newton
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'align' instruction on MIPS

What exactly does this instruction do? I know that it tries to align data with a multiple of a specific number but why would you need to do this? Is there an equivalent instruction in other assemblers?
Eliseo Ocampos
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How many AMD exclusive instructions are there on zen 3 CPUs?

How many instructions on zen 3 CPUs are exclusive to AMD? I am aware of only 3: mwaitx, monitorx, and clzero Also, the 3DNow! and lwp instruction sets were once AMD exclusive but they have since been removed.
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Why does SSE/AVX lack loading an immediate value?

As far as I know, there is no instruction in SSE/AVX for loading an immediate. One workaround is loading a value to a normal register and movd, but compilers seem to think this is more costly than loading from memory even for a single scalar…
xiver77
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Why does RISC-V not have an instruction to calculate carry out?

I need to deal with bignum calculation (addition and subtraction, but I treat subtraction as equivalent to signed addition) on RISC-V and the situation is a bit complicated. What I gather from half an hour of internet research: RISC-V operations do…
piegames
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NULL-free shellcode

I am trying to convert an assembly program I wrote into NULL-free shellcode. However, I am unsure how to go about this for certain instructions. Some of them (in Intel syntax) include: push 0x1000 and mov BYTE [eax],0x31 I want to avoid using…
cytinus
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Why doesn't Ice Lake have MOVDIRx like tremont? Do they already have better ones?

I notice that Intel Tremont has 64 bytes store instructions with MOVDIRI and MOVDIR64B. Those guarantees atomic write to memory, whereas don't guarantee the load atomicity. Moreover, the write is weakly ordered, immediately followed fencing may be…
sandthorn
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How does XCHG work in Intel assembly language?

How does the xchg instruction work in the following code? It is given that arrayD is a DWORD array of 1,2,3. mov eax, arrayD ; eax=1 xchg eax, [arrayD+4] ; eax=2 arrayD=2,1,3 Why isn't the array 1,1,3 after the xchg?
Alloysius Goh
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What does `b .` mean in this ASSEMBLY code?

So I'm looking into the source code for Redox OS (An operating system made with Rust) just to see if I can learn something. I'm reading the assembly file start.s in the bootloader folder. In the interrupt_vector_table label we…
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What is a circular shift with extend used for?

I remember in an assembly class, we learned the m68k processor, and there were 3 kinds of shifts you could do. Linear shift, circular shift, and circular shift with extend. The last one, circular shift with extend, basically rotates all bits left or…
DrZ214
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Why does ARM say that "A link register supports fast leaf function calls"

I have came across the concepts of link register and leaf functions recently. I understand from previous SO reads that the LR tells where the code was previously during execution. I also got to know that a leaf function is a function which comes…
achoora
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Is there any way to count the number of instructions in java

I want to know how many instructions my java code consumes to execute. I am looking for an api which starts the instruction count and the final total number of instructions should be returned at the end For example: public static void main() { int…
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