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Questions tagged [instruction-set]

Use for questions related to Instruction Set Architectures, ISA. For questions related to the inner workings of a CPU, use [cpu-architecture] instead.

An instruction set is a specification for a set of machine-readable instructions, or CPU instructions. An instruction set exists for all processing units including Graphics Processing Cores, Networking Card Processors as well at the CPU. The phrase "Instruction Set" usually implies the CPU type.

Each digital logic process which a processor can perform has an binary instruction code which caused the CPU to execute that exact instruction. An assembly language translates mnemonics into instruction codes. Instruction codes are likely to differ between different processor architectures. For example, the x86_64 instruction set for Intel CPU's includes additional 64 bit instructions (among others) for manipulating data 64 bits wide inside the CPU's core, which is an extension to the x86 32 bit capabilities of previous Intel CPU generations.

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Why do we Sign Extend in load word instruction?

I am learning MIPS 32 bit. I wanted to ask that why do we Sign Extend the 16 bit offset (in Single Cycle Datapath) before sending it to the ALU in case of Store Word?
user379888
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Which x86 instruction has a 10-byte immediate?

The Intel® 64 and IA-32 Software Developer's Manual, Volume 2A, Section 3.1.1.1 mentions the notation ct to denote a 10-byte value following the opcode. I am however unable to find any instruction which is annotated with it. Am I missing something…
Trillian
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How to use processor instructions in C++ to implement fast arithmetic operations

I was working on the C++ implementation of Shamir's secret sharing scheme. I split the message into 8-bit chunks and on each performs corresponding arithmetic. The underlying finite field was Rijndael's finite field F_256 / (x^8 + x^4 + x^3 + x +…
jakob
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What is the purpose of the PowerPC instruction `bcctr`?

I'm new to the PowerPC architecture and I'm looking at some disassembled code with the bcctr instruction. Although the manual specifies how the bcctr instruction works, it doesn't explain what it typically would be used for. Can you come up with…
John Källén
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why we can't move a 64-bit immediate value to memory?

First I am a little bit confused with the differences between movq and movabsq, my text book says: The regular movq instruction can only have immediate source operands that can be represented as 32-bit two’s-complement numbers. This value is then…
user9623401
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Does intel have a separate instruction set for it's GPU

Assume I'm using my Intel x64 based laptop with no dedicated GPU. I must have some GPU onboard otherwise my screen won't work, right? Are onboard GPUs typically embedded into the CPU? Does intel have a separate instruction set for it's GPU? if so…
user13493313
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Why is there no fused multiply-add for general-purpose registers on x86_64 CPUs?

On Intel and AMD x86_64 processors, SIMD vectorized registers have specific fused-multiply-add capabilities, but general-purpose (scalar, integer) registers don't - you basically need to multiply, then add (unless you can fit things into an…
einpoklum
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does gcc's __builtin_cpu_supports check for OS support?

GCC compiler provides a set of builtins to test some processor features, like availability of certain instruction sets. But, according to this thread we also may know certain cpu features may be not enabled by OS. So the question is: do…
Andrei R.
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MIPS: Why do we need load byte when we already have load word?

In the RISC MIPS instruction set, we have load byte (lbu), load half word (lhu) and load word (lw) instructions. It appears to me that everything lbu and lhu can do can be achieved with lw. So why did the MIPS designers introduce lbu and lhu? In…
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What's the point of instructions with only the REX prefix in 64bit mode?

For example one of the MOV has 2 versions, one with REX, one without (from Intel's doc) : 88 /r MOV r/m8, r8 REX + 88 /r MOV r/m8***, r8*** ***In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used:…
Simon
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VM interpreter - weighting performance benefits and drawbacks of larger instruction set / dispatch loop

I am developing a simple VM and I am in the middle of a crossroad. My initial goal was to use byte long instruction, and therefore a small loop and a quick computed goto dispatch. However, turns out reality could not be further from it - 256 is…
user2341104
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Do different ARM manufacturers provide different instruction sets?

I first came across the ARM instruction set in the 80's, and have not used it since. Out of curiosity I was looking at the the tablets and other ARM devices and note that the CPU's are produced by different manufacturers. I did a quick search but I…
Preet Sangha
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What assembly language does gcc produce on my system?

I'm trying to learn a bit about assembly. I decided to start by looking at the generated assembly files from simple source code. Of course, I get bombarded by instructions that I have no idea what they mean, and I start to search for their meaning…
JustANoob
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How do I determine the number of x86 machine instructions executed in a C program?

I'm currently working on a homework problem that asks me to find out the number of machine code instructions that are executed when running a short program I wrote in C. The question says I am able to use whatever tools I want to figure it out, but…
K. Heckman
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MOVZX missing 32 bit register to 64 bit register

Here's the instruction which copies (converts) unsigned registers: http://www.felixcloutier.com/x86/MOVZX.html Basically the instruction has 8->16, 8->32, 8->64, 16->32 and 16->64. Where's the 32->64 conversion? Do I have to use the signed version…
Ryan Brown
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