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Questions tagged [instruction-set]

Use for questions related to Instruction Set Architectures, ISA. For questions related to the inner workings of a CPU, use [cpu-architecture] instead.

An instruction set is a specification for a set of machine-readable instructions, or CPU instructions. An instruction set exists for all processing units including Graphics Processing Cores, Networking Card Processors as well at the CPU. The phrase "Instruction Set" usually implies the CPU type.

Each digital logic process which a processor can perform has an binary instruction code which caused the CPU to execute that exact instruction. An assembly language translates mnemonics into instruction codes. Instruction codes are likely to differ between different processor architectures. For example, the x86_64 instruction set for Intel CPU's includes additional 64 bit instructions (among others) for manipulating data 64 bits wide inside the CPU's core, which is an extension to the x86 32 bit capabilities of previous Intel CPU generations.

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Complete Instruction set

Consider a hypothetical computer with a main memory M having a capacity of 2n−1 n-bit words. The CPU contains an n-bit accumulator AC and an (n−1)-bit program counter PC.It has a repertoire of two n-bit instructions in which the leftmost bits is the…
Aditya Challa
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Fibonacci using SBN in OISC in Machine Language

I want to generate fibonacci series using SBN in an OISC architecture. My initial approach is to implement it in assembly language first and then convert it to machine language. The first steps involve storing 0 and 1 in 2 registers and then…
velociraptor
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Issues with Thumb-2 Branch Instruction

I'm currently creating an application that would take in the user's input and return to them the hex of the branch instruction they wanted. The input includes: Branch Type (Conditional/Non-Conditional) If conditional, the condition Address to…
Brave Heart
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Difference between PowerPc and MPC82X instruction set

I have started learning Assembly for PowerPC and came across MPC82x core which is built around powerpc core with QUICC Engine which is a separate RISC core. Now I when looked into the instruction set of MPC82x found it different than that of…
Amit Singh Tomar
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How to design a virtual cpu / instruction set: distinguish LDA $02 from LDA B

So, I'm designing my own virtual CPU. I have some registers and memory and can execute some rudimentary instructions. But, now I'm stuck. How can I differentiate (in my assembled "machine code") between: LDA $02 ; Load the hex value 0x01 into…
Ariejan
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How to convert MIPS instructions to machine code?

I'm stuck at converting the below MIPS instruction to machine code sb $t3, 40($s2) beq $s0, $s1, Lab1 j Lab1 jr $s0 So far, I have 101000 10010 01011 101000 000100 10000 10001 0x00400000 How do I go from here?…
user3754212
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MIPS Instruction code conversion to binary TIPS?

I am studying for the MIPS instruction code conversion to binary. I noticed while doing some conversions that instructions are formatted differently depending on the mnemonics(since DIFFERENT OPERATIONS) even they are the same I-type. sw $t7,…
user3754212
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What's the initial position of the Frame Pointer

When we call a function, we will make use of Stack Pointer and Framer Pointer. I know the function and initial position of SP, but how about FP?
Dong
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MIPS Instruction set

just a quick question while reading: http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Mips/format.html Under I-type Instruction, it says: "In this case, $rt is the destination register, and $rs is the only source register. It is unusual that $rd…
user3754212
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Meaning of CP15_reg1_Ubit in ARM

Could someone please explain the meaning of CP15_reg1_Ubit as used in the ARM architecture reference manual (LDR instruction and others too)? I just can't seem to find/understand it. Thanks
Niket Kandya
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MOV r,M : Where does HL pair fit into this?

https://encrypted.google.com/books?id=FIYGSv3-C6IC&pg=PA59&lpg=PA59&dq=mov+r,+M+8085&source=bl&ots=aX-essc34w&sig=vyGYCHeeJP_Dv_iE8ZjggI2Zh1k&hl=en&sa=X&ei=iZd8U6uJNNWhugSNoILADg&ved=0CF8Q6AEwCQ#v=onepage&q=mov%20r%2C%20M%208085&f=false From the…
aste123
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program for interpretation of a simple instruction set

I have a problem I need to solve and I have no freaking idea how to do it. If someone would be willing to help I would very much appreciate it. I know I'm asking for a lot, but I really need it. Create a program for interpretation of a simple…
marija
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uname command in cygwin

My computer's cpu is AMD Phenom(tm) II X4 810 Processor that its instruction set is X86-64. I know when I use command uname in Linux, I can see the information of my computer with X86-64 showing. However, when I use the command in cygwin in the…
kidoher
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RISC code loop termination

This is a RISC code I came across in a book. The code is to multiply 10 with 5. Mov ax,0 Mov bx,10 Mov cx,5 begin : Add ax,bx loop begin It is given that total number of cycles taken by this code is 13 cycles. I don't understand how…
nomorequestions
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Does a program use the same cpu registers everytime it is run?

When a program is run it uses the various registers eax, ebx etc. to store and move data. Does a program use the same registers every time it is run? Can the registers it does or does not use be found?
metaljester
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