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Questions tagged [instruction-set]

Use for questions related to Instruction Set Architectures, ISA. For questions related to the inner workings of a CPU, use [cpu-architecture] instead.

An instruction set is a specification for a set of machine-readable instructions, or CPU instructions. An instruction set exists for all processing units including Graphics Processing Cores, Networking Card Processors as well at the CPU. The phrase "Instruction Set" usually implies the CPU type.

Each digital logic process which a processor can perform has an binary instruction code which caused the CPU to execute that exact instruction. An assembly language translates mnemonics into instruction codes. Instruction codes are likely to differ between different processor architectures. For example, the x86_64 instruction set for Intel CPU's includes additional 64 bit instructions (among others) for manipulating data 64 bits wide inside the CPU's core, which is an extension to the x86 32 bit capabilities of previous Intel CPU generations.

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Correct order of source and destination in Assembly language

I just started learning computer organization and architecture. Computer organization by Carl Hamacher, Zaki... is my reference textbook. Currently, I am learning basic assembly instruction for adding two numbers A and B, and storing the result in…
mig001
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What's the microarchitecture used in the MIPS I.S.A?

I believed the microarchitecture used in a MIPS microprocessor, is the pipeline one, but I might be wrong? Thanks in advance for your answers!
Penguineer
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what is the difference between lhu and lbu in MIPS?

I'm trying to solve some problem from my class, which is asking me about the register and memory addresses, I understand how lw or lb instructions works but I don't understand lhu and lbu. when $r1 value is a 4000 and following explanation for this…
LeBitmin_310
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How to access pointers in SUBLEQ

I've recently started to learn about SUBLEQ One Instruction Set Computers and am currently trying to write a simple assembler for a SUBLEQ emulator i wrote. So far I've implemented DB, MOV, INC and DEC, but I am struggling a bit with the MOV…
Merlin0216
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Where are instruction set stored in computer?

it been a while where i took my architecture class Memory part my question is where are instructions set stored in computer ?
Nour
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How much variance does the timing of x86 instructions have?

I'm wondering whether it is possible to determine, for a specific processor model, the time an instruction takes to execute and how much variance this value may have due to hardware or architectural properties like pipelining or the processors'…
2080
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Does the MARS instruction counter work with Static or Dynamic Instructions?

I found this thread regarding the instruction counter, but wanted a bit more info on how the counter works within MARS4. Are the instructions displayed Static or Dynamic? If so, is there a way to find the other one? Thank you!
Apeirologue
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What is the result of executing DIV #0 and DIVF #0 instructions?

In the SIC/XE architecture, what happens after execution of DIV #0 and DIVF #0 instructions? How do other architectures deal with divide by zero situation?
Sai Aravind
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Why register list of PUSH must not include PC?

PUSH {R0, PC} ; A1477E: This register combination results in UNPREDICTABLE behaviour Why does it cause unpredictable behaviour? Why is LR allowed in register list but not PC? I think implementing recursive functions will be much easier using LR in…
Vighnesh Nayak
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What is the difference between core2-64-poky-linux and x86_64-linux directory in Yocto which located in build/tmp/work?

What is the difference between core2-64-poky-linux and x86_64-linux directories in Yocto Project, which are located in build/tmp/work/~? Some of modules(recipe) are built and their output belong to path build/tmp/work/core2-64-poky-linux, some…
OfusJK
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Understanding LEA instruction x86

I've already read many answers regarding the LEA instruction and I think, I understand them, but if I'm trying to understand the following assembly code, then this subject doesn't make sense to me anymore. And the corresponding C program: So leal…
pramort
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How does one proceed in defining binary (1 & 0) sequences for the making of an assembly language from that same custom encoded binary?

Apart from binary just being binary intrinsically (decimal notation, etc.) the binary sequences still have to be programmed to mean & initiate certain tasks. With that being said, & to be more specific/clarify: How does one implement a custom…
richcoder
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Instruction format in direct addressing mode

Assume a computer with a 16-bit memory and 16-bit data and address bus. So if an Instruction is of 16-bit let's say the opcode occupies 6 bits and the operand occupies the remaining 10 bits. In the direct addressing mode, the memory address of the…
Mr Bobcat
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Is it useful to have 32 floating-point scalar registers?

In the design of instruction set architectures, it has been reckoned that 16 integer registers is close to the point of diminishing returns; if you compile typical code for 16 vs 32 registers keeping everything else constant, the number of spills…
rwallace
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Can the AMD64 ISA work without licensing the x86 ISA?

I know that AMD64 aka. x86-64 is AMD's own proprietary technology and can be licensed by 3rd parties, and they do, like Intel, VIA, etc. I also know that the "big thing" about AMD64 ISA is that it extends the x86 ISA, thus compatibility is a…
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