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Questions tagged [armv8]

This tag is for questions regarding specifically version 8 of the ARM architecture - 32-bit or 64-bit. Questions about the 64-bit ARM execution state or instruction set should be tagged with [arm64].

Version 8 of the ARM architecture introduced a new 64-bit execution state (AArch64) with a new 64-bit instruction set (A64) as well as retaining and extending the existing 32-bit execution state (AArch32) and its instruction sets A32 ("ARM") and T32 ("Thumb").

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(Armv8 Assembly) How to fix print statements?

Having trouble debugging the following code: // create format strings fmt1: .string "Initial pyramid values:\n" fmt2: .string "Pyramid %s origin = (%d, %d)\n" fmt3: .string "\tBase width = %d Base length = %d\n" fmt4: .string …
JohnnieCoder
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assembly subroutine not returning

So i'm writing an ARMv8 assembly program using subroutines. I'm using the 'bl' command to jump to and return from a specific subroutine, but at the end of the subroutine it is not returning. main: stp x29, x30, [sp,-16]! mov x29, x30 …
user2912093
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ARMv8 illegal instruction

I have written the following assembly for ARMv8: .text .align 4 .global permute .type permute, %function permute: ld2 {v0.2d - v1.2d}, [x0], #32 ld2 {v2.2d - v3.2d}, [x0], #32 ld2 {v4.2d -…
Martin Lauridsen
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Linux for armv8 - Avoid all idle processor states

I have a ARMv8 (Cortex A57) platform. I want to perform some performance measurements. For this I want to avoid all possible power idle states the processor has. Is there any kind of kernel config I can add to my .config to completely avoid…
alabamajack
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Why beaglebone black uboot is configured to CONFIG_SYS_CPU="armv7". When bbb is armv8?

Looking into .config file after configuring uboot for bbb using make am335x_boneblack_defconfig It…
sourav punoriyar
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Will bootloader for armv7 work for armv8?

I am trying to write a bootloader according to armv7 architecture using armv7 assembly instruction set ? Ex: Setting cpu to svc mode on reset: mrs r0, cpsr bic r0, r0,#0x1f orr r0, r0,#0xd3 msr cpsr, r0 mov pc, lr Will the same bootloader work on…
sourav punoriyar
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Do conditional branches update flags in ARMv8

I am trying to achieve something similar to the following C code: if(x<0) { } else if(x == 0) { } else //x > 0 { } postIf code So i was wondering if I could do this by doing the following in ARMv8,…
Erick P
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Choosing gcc Compiler for 64-bit arm design

I have been doing some bare metal programming in 32-bit iMX6q SABRE-SD board(arm Cortex-A9). I have used "arm-none-eabi" as the Toolchain. Now, I would like to port all the codes i have written to 64-bit arm Cortex-A57 (R-Car M3 board). How would i…
Ajeesh
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How to type EOF in ARMv8 Assembly?

I am using the ARMv8 instruction set with Aarch64 execution state. The problem I am having, is were supposed to translate C code into assembly, and I am stuck on the following: while (c != '\n' && c != EOF) c = getchar(); I know the basic setup…
Erick P
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Implement a 32x64 register file in Verilog

Here are the specifications of the register file: Buses A, B, and W are 64 bits wide. When RegWr is set to 1, then the data on Bus W is stored in the register specified by Rw, on the negative (falling) clock edge. Register 31 must always read…
hk1111
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How to set a write watchpoint for a variable on the stack

In my code, I have mov x21, 0 str x21, [x29, 16] and then later on in the code, ldr x22, [x29, 16] which stores 0 into x22. And then, even later in the code, I have ldr x23, [x29, 16] which ends up storing 214748364800 into x23 even though there…
Erick P
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Route of debug exceptions (like software step exception) in ARMv8

In ARMv8 manual, it talks about the route of debug exceptions. However, it seems that the debug exceptions could only be route to EL1 or EL2. Is there any way to route the debug exceptions to EL3? I am not familiar with EL2 (the hypervisor mode in…
Zhenyu Ning
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QEMU for ARMv8-A (and higher): which FPCR control bits are supported?

I'm trying to find which FPCR control bits (such as AHP, DN, FZ, etc.) are supported in QEMU for ARMv8-A (and higher). I've already tried to search (for example) for "FPCR" on www.qemu.org. However, the search did not match any documents. Is there a…
pmor
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is there any resource upon software protection by obstructing code flow analysis on arm platform?

In the world of x86, early return is a very common effect way to confuse the dissembler. http://www.ouah.org/linux-anti-debugging.txt Jacob Baines have implemented a state of the art early return tech with jmp to obstructing code flow analysis,…
prgbenz
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Store instruction in NEON armv8 assembly

I am learning how to program in armv8 assembly using neon. This code compiles, but it freezes at running time. The first part is where the variables are created (array1), the second part (Main) is where the code starts, like the…
MustSee
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