I'm trying to find which FPCR control bits (such as AHP, DN, FZ, etc.) are supported in QEMU for ARMv8-A (and higher). I've already tried to search (for example) for "FPCR" on www.qemu.org. However, the search did not match any documents.
Is there a documentation or do I need to examine the QEMU's source code?
In general for Arm[*] you can mostly assume that QEMU implements what the architecture requires. Where features are part of an architectural extension you can look at the list of emulated architecture features to see if QEMU implements that feature. (This list changes over time so if you aren't running the most recent QEMU you should check the docs corresponding to the version you are running.) Guest software can check for feature presence via the ID registers, just as it would on real hardware.
If you are suspicious about something specific not being implemented then unfortunately you'll need to go diving in the source code or ask on the mailing lists to confirm.
For the FPCR in particular, we should implement correctly all the architecturally required behaviour for the architecture and the architecture extensions we provide. (Some FPCR bits are specific to an architectural extension; for example FPCR.FZ16 is part of FEAT_FP16, which we implement, but FPCR.FIZ is part of FEAT_AFP, which we don't yet implement. So FPCR.FZ16 will work, assuming you've asked QEMU to emulate a CPU type with FEAT_FP16, and FPCR.FIZ will not.)
QEMU doesn't generally document where it makes permitted implementation-defined choices. An example of this for the FPCR is that we don't implement trapping of floating point exceptions, and so the IDE, IXE, UFE, OFE, DZE, IOE bits are RAZ/WI. (Most hardware doesn't implement trapping either.)
[*] This holds somewhat less for some other architectures, as it depends on how active development is for a given guest architecture.
