Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

296 questions
0
votes
2 answers

X86: addressing mode - register value change

This maybe very silly, but have a small doubt regarding these type of instructions: MOV EBX,dword ptr [RAX + 0x28] Does this change the value of RAX? Something like: Mov the value pointed by RAX + 0x28 in EBX and then add, Add RAX, 0x28. So, in…
R4444
  • 2,016
  • 2
  • 19
  • 30
0
votes
1 answer

Integer multiplication and indexed addressing

My teacher assigned us this worksheet and it is really giving me trouble. I'm having trouble knowing exactly what I'm supposed to multiply or divide the index instruction from and then determining overflow based on that. For instance on letter E we…
0
votes
1 answer

Visual studio C++ Assembly | Meaning of the brackets?

I am trying to compare the assembly for two pieces of code and they look like shown below. My question is if the additions in [esp+4] [esp+8] [esp+0Ch] are performed at run-time, or somehow resolved before that. Version 1 00FE104D mov …
Aedoro
  • 609
  • 1
  • 6
  • 21
0
votes
1 answer

How can I do this section of code, but using auto-indexing with ARM Assembly

this works, but I have to do it using auto-indexing and I can not figure out that part. writeloop: cmp r0, #10 beq writedone ldr r1, =array1 lsl r2, r0, #2 add r2, r1, r2 str r2, [r2] add r0, r0, #1 b writeloop and for data I…
dcalvert
  • 73
  • 1
  • 11
0
votes
2 answers

Explanation of array accessing in X86 assembly

I have the following C function: int sum_arr(int b[], int size){ int counter = size-1; int res = 0; while(counter >= 0){ res = res + b[counter]; counter = counter - 1; } return res; } From which I…
sn3jd3r
  • 496
  • 2
  • 18
0
votes
2 answers

Memory addressing mode interpretation for x86 on Linux

I am reading through Programming from the ground up by Jonathan Bartlett. The author discusses memory addressing mode and states that the general form of memory address reference is this: ADDRESS_OR_OFFSET (%BASE_OR_OFFSET, %INDEX, MULTIPLIER) where…
Tryer
  • 3,580
  • 1
  • 26
  • 49
0
votes
0 answers

Am I allowed to use two registers in a MIPS addressing mode, as an index?

I have the following C row code: B[x] = A[x+7] + A[x+2]; Assuming that A is stored in $s0, B in $s1 and x in $t0. I have got the following MIPS code: add $t1, $t0, 7 add $t2, $t0, 2 lw $t3, $t1($s0) lw $t4, $t2($s0) add $t3, $t3, $t4 sw …
0
votes
2 answers

Addressing in 6502

I've recently begun programming in 6502 assembly and I've run into a problem. I'd like to be able to store a 16-bit memory address beginning from address $0300, then I'd like to store a value at that address. For example storing the address $2016…
xCoduster
  • 13
  • 2
0
votes
1 answer

How to rewrite [es:di] to att syntax

This is a short question but I did not manage to find the answer online. How do you rewrite mov [es:di], dl into AT&T syntax? I use it to write a pixel to the screen in real mode.
0
votes
0 answers

Calculating a Real Address from a Virtual Address

Below is an example of a question from a work sheet of my Computer Engineering course. Up until now we've been given some information to work with, such as the address space of the device, the RAM memory capacity, and so on, so I might be…
0
votes
2 answers

Omission of base register in x86 AT&T addressing mode

I am trying to decode the syntax of the intel IA32 x86 cmp command. The command in question is cmp 0x804a38(,%ebx,4), %eax I have a rough estimate of whats going on - the (content of ebx *4) + 0x0804a38 is then subtracted from eax and the…
0
votes
1 answer

Why the ModR/M:rm field is 100 in mov al, byte ptr [rbx + rsi*2 + 0x100]?

The instruction mov al, byte ptr [rbx + rsi*2 + 0x100] is encoded to 8a 84 73 00 01 00 00 meaning that ModR/M is 0x84 or 10.000.100 I understand the mod (10) and the reg (000) fields, but don't know why rm is 100. Could anyone explain the rule…
Leandro Caniglia
  • 14,495
  • 4
  • 29
  • 51
0
votes
0 answers

Calculate Effective Address Register in z/OS

5.5.2.(3)+ Suppose the contents of the general registers are as follows: C(GR0) = 00010A20 C(GR8) = 8031B244 C(GR1) = 42319B7C C(GR9) = 00000010 C(GR2) = 91F0F002 C(GR10) = 723B94C1 C(GR3) = 1002340A C(GR11) = E931AB7F C(GR4) = 00FF00FF C(GR12)…
0
votes
0 answers

MASM32 Direct Addressing - A2070 Invalid Instruction Operands

I am new to MASM coding. I found that it is really difficult to handle with registers, due to lack of knowledge in built-in functions. I am trying to write a program to change all letters in input string to CAPITAL letters. Here is my…
Brian Tsui
  • 21
  • 2
0
votes
1 answer

Tricore Disassembling "Constants"

Can someone here explain me, how the TC17** assembler works out the "movh.a and lea" addressing (hex), and how i can calculate them for myself if i have an configuration value like shown in my picture, which is defined as a "constant" or a "global".…
C.E.
  • 664
  • 2
  • 5
  • 21