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Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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how addressing mode works in nasm x86 assembly language?

i am totally confused about addressing modes in nasm x86 assembly language. after reading nasm manual i found that [ ] is used to get the value at the memory location specified inside square brackets. my understanding: var db 10 mov eax , var ;…
user7585784
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What means then 32 bits addressing with db opcode on x86 architecture

I porting a good and I faced the following assembly x86 lines: mov al, UNLOCK_DATA1 ; load al with byte for the first unlock write db 67h ; use 32 bit addressing mov ds:[esi], al ; write the command to flash mov eax, FLASH_ADDRESS…
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Assembler - indirect memory addressing

i'm a newbie to Assembly , done some Java/C before.. so it's like learning to crawl after flying. Im currently learning from 'Tutorial's Point' as it seems really begginer friendly. I've encountered this code: MY_TABLE TIMES 10 DW 0 ; Allocates 10…
YuvalHelman
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Direct memory addressing in Assembly and []

I'm reading this https://en.wikibooks.org/wiki/X86_Assembly/X86_Architecture#General-purpose_registers_.2864-bit_naming_conventions.29 At Direct memory addressing it says: .data my_var dw 0abcdh ; my_var = 0xabcd .code mov ax, [my_var] ; copy…
Kotaa
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Addressing modes of x86 far call and jmp instructions

It seems that x86 supports several addressing modes, as shown in following picture. It seems that far jump does not support immediate addressing mode, however I am not sure. What x86 addressing modes are supported or legal for the far jump (FF /5)…
Albaforia
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Using "For-Loop" for addressing method in generic VHDL code

This is my first time posting, so I will try to be as more specific as I can. In the part of the code that I am going to post, I am trying to implement in a generic way the code in the "Case"-expression that I have commented out. This code, is part…
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Reading RIP register gives next instruction's address?

I try to read the value of x86_64 register rip. Here is what objdump shows. 4017ec: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi 4017f3: 41 89 d4 mov %edx,%r12d I expect that after instruction 0x4017ec is executed, the value of rsi…
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x86-64 address calculation in 64bit mode with 32-bit address-size

I read Intel manual about address calculation in 64 bit mode. Suppose we have 64 bit mode, default address size is 64 bit. Suppose also that instruction in question is preceded by address size override prefix, so address size becomes 32 bit. Now,…
igntec
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Why is Visual C++ 2010 using this Assembly syntax for memory addressing?

I converted the following C++ code into Assembly using Visual C++ 2010: int main() { int i; i = 1234; return 0; } I received the following output: Based on my understanding of memory addressing, the computation for the memory address…
user4344762
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Indexed addressing mode

I have been experimenting with different addressing modes and doing research on the subject; in my attempt to use indexed addressing mode, I borrowed pieces of code from different examples on SO. In the example below: outerLoop: cmp edi, 50 …
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Memory refrencing Assembly Language

i am a beginner in assembly language i understand many things till now but for many days i stuck in one section it's confusing to me and what make it worst that through the many pages i visited over internet the information is twisted again ,this…
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Masm indirect addressing mode for MOV command

I've tried the following forms and masm doesn't like any of them: mov byte [myVariable], al mov byte ptr [myVariable], al mov [byte myVariable], al What am I missing? Why can't I seem to use indirect addressing. the error I get from masm is…
Without Me It Just Aweso
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Which is the first address of ARM DA(Decrement After) addressing mode?

I have two questions about DA addressing mode. For example: STMDA R0!, {R1-R7} The start address will be R0 - (7 * 4) + 4, that is, R0-24, according to the ARM Architecture reference manual and end_address will be R0. So: Will the value of R1 will…
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More insight on Register Indirect Mode for assembly language

I am reading a book about 80x86 assembly language entitled "Introduction to 80x86 Assembly Language and Computer Architecture Second Edition" by Richard C. Detmer. I am having a hard time understand Register Indirect Mode, my book says this: "Our…
Code Doggo
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x86 addressing mode

I am very confused regarding the indirect addressing mode for this instruction: and $0x0000FF00, 4(%esp) If this is the current top of stack: 0xBF8DB0B8: 0xDEADBEEF <--- ESP + 4 0xBF8DB0B4: 0xDEADBEEF <--- ESP and this is the content of memory at…
Hery
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