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Questions tagged [xeon-phi]

a co-processor/accelerator from Intel

Intel Many Integrated Core Architecture or Intel MIC (pronounced Mike) is a multiprocessor computer architecture developed by Intel incorporating earlier work on the Larrabee many core architecture, the Teraflops Research Chip multicore chip research project, and the Intel Single-chip Cloud Computer multicore microprocessor.

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thread numbers and time results consistency

I am trying to learn xeon phi programming. I am running this code on cpu and I am using offload pragmas for the pieces I want to run on the coprocessors. Since I am compiling on cpu and I use offloads , I am using : export MIC_ENV_PREFIX=MIC export…
George
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How can I know whether my CPU shares the vector registers among the cores or each core has its private ones?

How can I know whether my CPU shares the vector registers among the cores or each core has its private ones? Where can I get the references? I hope to use multi-threading and SIMD to optimise my program's floating-point computation. Will they cause…
Adam
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Can Intel Xeon Phi get data direct from another PCI device?

Can Intel Xeon Phi be configured to receive data direct from FPGA board, process them and send result to host memory? I have large flow of input data and don't want to have redundant transfers (FPGA board ->Host Memory->MIC->Host Memory) over PCI. I…
FunctorPrototype
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Coprocessor accelerators compared to GPUs

Are coprocessors like Intel Xeon-Phi supposed to be utilized much like the GPUs, so that one should offload a large amount of blocks executing a single kernel, so that only the overall throughput the coprocessor handles results in a speed up, OR…
Marc Andreson
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Why Xeon Phi always got bad efficacy?

I tried to run a for loop 1,000,000,000 times on Xeon E5 and Xeon Phi, and measurement time to compare their efficacy, I'm so surprise I got the following result: On E5 (1 Thread): 41.563 Sec On E5 (24 Threads): 22.788 Sec Offload on Xeon Phi (240…
Marcus Wu
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Only 14 RAPI events are available on Xeon Phi. Why so few?

I'm trying to use RAPI to monitor the performance of my Xeon Phi code. I just compiled and installed a native version of RAPI follwoing the documentation. And the following list is what I get when I execute "rapi_avail" on my Xeon Phi which shall…
thierry
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pthread_create() fails (invalid argument) every 60 threads on Xeon Phi

I have a piece of pthread code listed as the function "thread" here. It basically creates a number of threads (usually 240 on Xeon Phi and 16 on CPU) and then join them. If I call this thread() only once, it works perfectly on both CPU and Xeon…
thierry
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Link Error with MIC.o file

While linking the sources of an application for the MIC with the Intel C++ (icpc) compiler i got an error. intel-icc/2013-64 Version: SOMETHINGMIC.o: relocation R_X86_64_PC32 against undefined symbol `_ZN9__gnu_cxx21__atomic_add_dispatchEPii' can…
SScholl
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Dynamic memory slow down on Intel Xeon Phi

i am creating a simple matrix multiplication procedure, operating on the Intel Xeon Phi architecture.The procedure looks like this (parameters are A, B, C), and the timing doesn't include initialization: //start timing for(int i = 0; i < size;…
alessandrolenzi
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Xeon phi co processor only mode using MPI, connection refused

Typed command like below $ mpiicpc -mmic -o Hello.MIC Hello.c $ scp Hello.MIC mic0:/tmp/Hello.MIC $ export I_MPI_MIC=enable $ mpirun -n 2 -host mic0 /tmp/Hello.MIC and I got this error [proxy:0:0@mic0.local] HYDU_sock_connect…
Loigc
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Strange results on MIC

For my thesis, I have run a simple code used to study a Lennard Jones system on a Xeon Phi coprocessor and I tried to vectorize it and study the variations on execution time. The machine I used in particular has 61 cores with 32 kB of L1 cache and…
PunishCrow12
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How to differentiate between Intel Xeon Phi Coprocessors 7120P, 7120X, 7120D, 7120A

I have a Xeon phi coprocessor 7120P. When i run micinfo, i see board SKU to be C0PRQ-7120 P/A/X/D. I notice that the SMC HW Revision states Product 300W Passive CS and i read on tomshardware that P stands for passive cooling for the intel xeon phi…
hrs
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Debugging Intel Xeon Phi Native application

I want to debug a native application on Intel Xeon Phi. I installed MPSS 3.2.3 which provides gdb-mic but that doesn't seem to run natively. In some documents, they mention a file "/usr/linux-k1om-4.7/linux-k1om/usr/bin/gdb", but in that directory…
Rakib
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xeon phi timer resolution

My main aim was to insert 1ms delay in xeon phi coprocessor but I was getting ~9ms difference in my results. So, I tried experimenting with xeon host machine and phi coprocessor to find the timer resolution. I executed the following code: …
Surya Narayanan
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Manipulating Masks for doubles on Xeon Phi

I am doing conditional computations on a Xeon Phi using intrinsic functions. I have to use double values so i need a __mmask8. As long as I use some of the compare functions there is no problem for me, but if I want to modify those masks I run into…
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