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Can Intel Xeon Phi be configured to receive data direct from FPGA board, process them and send result to host memory?

I have large flow of input data and don't want to have redundant transfers (FPGA board ->Host Memory->MIC->Host Memory) over PCI. I want more elegant scheme (FPGA board-> MIC->Host Memory) Is it possible?

FunctorPrototype
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  • I believe the answer is yes, but need to check on the details. I recall a discussion on directly accessing an ssd from the coprocessor over the PCIe bus. I'll dig it out. – Taylor Kidd Feb 06 '15 at 17:12

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In case you don't know, this question was posted and it receives some comments at Intel Many Integrated Core Architecture Forum https://software.intel.com/en-us/forums/topic/540368

user3582234
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