Questions about instructions of real CPUs, VMs or compiler IRs.
Questions about instructions of real CPUs such as ARM and x86, virtual machines such as Java, or compiler internal representations such as LLVM.
Questions tagged [instructions]
574 questions
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1 answer
Most frequently used instructions
Every now and then I read somewhere that of all of the instruction a CPU has only very few are used most of the time, last time it was here where the author writes: "There are only a handful of different instructions that account for 90% of all…
Ecir Hana
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1 answer
Question regarding converting assembly to c -- specifically what the movzbl instruction does?
I am trying to figure out what this in assembly would mean in C:
movq 16(%rdi), %rdx
movq 16(%rsi), %rax
movzbl (%rdx), %edx
I am mostly confused about what the movzbl (%rdx), %edx will do. Thanks!
210312312
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2 answers
Why opcode is 6-bit long in MIPS 32 bit Architecture
Below is Data transfer instruction format for 32-bit ARM and MIPS architecture. 32-bit ARM architecture have 4 bit opcode because there are 16 registers (2^4=16).32-bit MIPS architecture have 6 bit opcode. Should not it be 5 bits considering there…
Tom
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1 answer
Alternative for sw MIPS instruction
What is an alternative to save a word from register into RAM?
For example i can explain lw command as lui, ori. How could be 4 Bytes stored into RAM without using sw?
dancingsushi
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1 answer
How do things work in the fetch phase of the instruction cycle?
There's something that confuses me, in Computer System Architecture(Morris Mano), Chapter 5, the book uses a simple microprocessor which has the following instruction cycle:
e.g. LDA Operation:
AR<---PC (T0)
IR<---M[AR] (T1)
PC<---PC+1 (T1)
Decode…
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votes
4 answers
What does the 'and' instruction do to the operands in assembly language?
What does the 'and' instruction do in assembly language? I was told that it checks the bit order of the operands and sets the 1s to true and anything else to false, but I don't know what it actually does or what effect it has on the code.
user548010
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Why sub eax, '0' for adding instead of just add?
So, I've been trying to learn some assembly and I saw an example of an addition but I don't really understand one thing:
section .text
global _start
_start:
mov eax, '3'
sub eax, '0'
mov ebx, '4'
sub…
Deketh
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1 answer
Changing assembler instruction to a more detailled one - Did I do it right?
The following assember instruction is given:
SUB[R1], 8[-R2]
The form this instruction is calculated:
op1 = op1 - op2
The first operand is addressed "register indirectly". The second one is addressed "register indexed" with pre-decrement…
rpbudd
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votes
2 answers
Operating Systems: Compiler Confusion
I was posed the question by a classmate asking since an OS is an extended or virtual machine, does the compiler need to know the number of registers, or instructions of the processor when it generates assembly code of a C program.
I've spent a while…
Bob
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1 answer
What does this set of instructions do?
What does this set of instructions do?
7ffff7a97759 mov 0x33b780(%rip),%rax # 0x7ffff7dd2ee0
7ffff7a97760 mov (%rax),%rax
7ffff7a97763 test %rax,%rax
7ffff7a97766 jne 0x7ffff7a9787a
I can't figure out what…
Bing Bang
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votes
2 answers
Should all code compiled for 32 bit machines be in 4 byte chunks?
I have a simple 32-bit assembly code that I wrote:
movl $0x542412e6, %eax
movl %ebp , %edx
addl $0x30, %edx
movl %edx, %ebp
pushl 0x08048dd6
ret
When I run this command:
gcc -m32 -c e.s
I get the following 18 bytes:
0: b8 e6 12 24 54 …
Chace Fields
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1 answer
no such instruction .. gcc x86_64
I have this code block:
void CallAnyFunc(void *pfn, const std::vector &arguments, CLR_DataType returnType, AnyFuncReturn &returnValue)
{
int i4;
float r4;
double r8;
long int i8;
char* pStack;
const char* i =…
iamacomputer
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votes
1 answer
Confused about how an ARM32 processor distinguishes between a register and immediate instruction
I am looking at various instructions for an ARM32 processor, and am confused about how the processor is able to distinguish between an instruction that operates on registers and an instruction that operates with an immediate value. For example, in…
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votes
3 answers
Optimizing XOR of `char` with the highest byte of `int`
Let we have int i and char c.
When use i ^= c the compiler will XOR c with the lowest byte of i, and will translate the code to the single processor instruction.
When we need to XOR c with highest byte of i we can do something like this:
i ^= c <<…
NoSkill
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votes
2 answers
How to intercept instructions sent to the CPU
I'm looking for a way to intercept instructions sent to the cpu.
More specifically op-codes that are being sent in and what thread sent them in.
papadp
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