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Questions tagged [fpga]

A Field-programmable Gate Array (FPGA) is a chip that is configured by the customer after manufacturing—hence "field-programmable".

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence "field-programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC).

There are four major manufacturers of FPGAs:

When asking a question, specify a manufacturer and FPGA model family if applicable.

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Manipulating 80 bits datatype in C

I'm implementing some cryptographic algorithm in C which involves an 80 bits key. A particular operation involves a rotate shifting the key x number of bits. I've tried the long double type which if I'm not wrong is 80bits, but that doesn't work…
gamerx
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Linux PCIe DMA Driver (Xilinx XDMA)

I am currently working with the Xilinx XDMA driver (see here for source code: XDMA Source), and am attempting to get it to run (before you ask: I have contacted my technical support point of contact and the Xilinx forum is riddled with people having…
It'sPete
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When to use VHDL library std_logic_unsigned and numeric_std?

I use VHDL-200X in ISE.I always use data type like std_logic_vector,std_logic,integer,boolean and real.Always use std_logic_vector convert to integer and reverse. My team mates ask me to use these three parts of library IEEE. library IEEE; use…
Liang He
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Starting FPGA Programming

I want to start FPGA programming. I don't have any knowledge at all about how FPGAs work and such. I would like to get a development board, not too expensive, but it should have at least 40 I/O pins. Anything up to $300 is OK. I decided that I want…
Ledio Berdellima
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Passing parameters to Verilog modules

I am in the process of writing some Verilog modules for an FPGA design. I looked around the internet to find out how I best parametrize my modules. I see two different methods occurring often. I included an example hereunder of the two different…
eavsteen
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efficient integration of FPGA into computer system

FPGA's are used widely in the industry to gain better performance by implementing programs on the FPGA instead of software. How do these companies efficiently integrate the FPGA's into their systems? I have very limited experience with FPGA's and…
Michelrandahl
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Resources for learning Verilog

I'm new to Verilog. Can someone suggest a learning resource, book, video, blog or anything that they had a good personal experience with and helped them learn it faster? If it helps, I have experience programming in several high-level languages,…
harry
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Is conversion from OpenCV code to FPGA code is easier than Matlab code or not?

I want to do project on image processing. i want to know if i want to implement this project on FPGA, which tool should I choose at 1st stage Matlab or OPEN CV? and is it possible to convert code from Open CV to FPGA directly like code generator…
M.Naeem G
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Do bitwise operations distribute over addition?

I'm looking at an algorithm I'm trying to optimize, and it's basically a lot of bit twiddling, followed by some additions in a tight feedback. If I could use carry-save addition for the adders, it would really help me speed things up, but I'm not…
gct
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Linux driver DMA transfer to a PCIe card with PC as master

I am working on a DMA routine to transfer data from PC to a FPGA on a PCIe card. I read DMA-API.txt and LDD3 ch. 15 for details. However, I could not figure out how to do a DMA transfer from PC to a consistent block of iomem on the PCIe card. The…
kohpe
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How to set up Eclipse for FPGA design in VHDL and Verilog)?

I am new with Eclipse, I have used it for SW development and in Altra environment for Nios processor. But now, I have a pretty large project that I have to manage and I would like to use Eclipse to have all the files in the system to make it easier…
FarhadA
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Ideas for a flexible/generic decoder in VHDL

I want to create an address Decoder that is flexible enough for me to use when changing the number of bits of the selector and of the decoded output signals. So, instead of having a static (fixed input/output size) Decoder that looks something like…
Erick Tejada
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Open Source OCR system for FPGA

Do you know of any open source (open core) implementations of an OCR for FPGA either in C or in HDL? Where can I find them? Thanks
The Byzantine
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iCEstick + yosys - using the Global Set/Reset (GSR)

This is probably more of an iCEstick question than a yosys one, but asking here since I'm using the Icestorm tool chain. I want to specify startup behavior of my design, which various places on the internet seem to agree is related to the typically…
Myles Hathcock
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Is it possible to create a simulation waveform from yosys output

I've found simulating using iverilog to be a less than suitable method, I can simulate designs that won't synthesise and conversely designs that will not only synthesize but also work as intended on physical hardware, won't synthesise with iverilog…
Chris Camacho
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