Questions tagged [addressing-mode]

An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

From Wikipedia (Addressing mode):

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.

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What does adding two registers in square brackets mean?

What adding two registers together in square brackets mean? I have a question about these lines of code: "mov al, [ebx+edx];" "mov [ecx+edx],al;" I know that mov instruction should move values from source to destination. But I don't really know…
Matthew
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What type of addresses can the port 7 store AGU handle on recent Intel x86?

Starting with Haswell, Intel CPU micro-architectures have had a dedicated store-address unit on port 7 which can handle the address-generation uop for some store operations (the other uop, store data always goes to port 4). Originally it was…
BeeOnRope
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Do terms like direct/indirect addressing mode actual exists in the Intel x86 manuals

To give a little bit of background, I wanted to study how x86 instructions are encoded/decoded manually. I came across the ModR/M and SIB bytes and it seems that understanding the x86 addressing modes is fundamental to understanding the instruction…
user1720897
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What is an effective address?

While reading the Intel 64 and IA-32 Architectures Software Developer’s Manual, the operation section for the LEA instruction (load effective address) uses a calculation called EffectiveAddress(SRC) which is not defined anywhere else. What is the…
Doug Richardson
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Is there a way to programmatically determine addressing mode from an opcode for the 6502?

I.e. are the different addressing modes encoded somehow in the opcodes? Can they be extracted programmatically or does this info only exist in the documentation of the 6502? I'm writing an emulator and I'm not concerned with performance. It would be…
Andreas
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How does the 68000 internally represent instructions?

How does the 68000 internally represent instructions. I've read that there are different types of instructions: single effective operation word format instructions, brief and full extension word format instructions. The single effective operation…
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Assembly (,%eax,4)

If one of my command lines says: jmp *0x804a180(,%eax,4) what does that mean? I ask specifically because there is no value before the first comma and I'm not sure exactly what the * before the address means.
arc
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Was there ever 8-bit memory addressing in the original 16-bit x86?

In real mode and 32-bit protected mode, 16-bit addressing is used to reference memory via the ModR/M byte. This addressing is only supported in i386 instructions with use of legacy prefixes, and entirely unsupported in x86-64 instructions. However,…
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Assembly Addressing Modes

Can someone please explain what the difference between the following two are? I'm finding it a little difficult to understand the concepts behind addressing modes mov ax, [bx + di + 10] mov ax, [bx + di] + 10 Thanks so much!
Yuki
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x86 register names, addressing modes, displacement, and storage

I have a few questions about assembly which I am learning and I am confused by. What is the difference between bx and bp and ss and sp? The book says that bx is base register and bp is base pointer. Does this mean they are the same thing? What is…
tina nyaa
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Understanding the SIB byte in x86 Assembly

I have read every article google has shown about the SIB byte, as well as this video and the Intel Manuals, but still a bit unclear. This page is particularly helpful, with this content: [ reg32 + eax*n ] MOD = 00 [ reg32 + ebx*n ] [ reg32 + ecx*n…
Lance
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Bottleneck when using indexed addressing modes

I performed the following experiments both on a Haswell and a Coffee Lake machine. The instruction cmp rbx, qword ptr [r14+rax] has a throughput of 0.5 (i.e., 2 instructions per cycle). This is as expected. The instruction is decoded to one µop…
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Does the order of class members affect access speed?

I'm writing a delegate library that is supposed to have absolutely no overhead. Therefore it's important that the access of a function pointer is done as fast as possible. So my question is: Does the access speed depend on the member position in a…
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Why are Square Brackets used in LEA?

In assembly, the square brackets [] seem to have the same meaning as * in C programming language. They are used to dereference a pointer. Dereferencing a pointer means going to refer to a specific memory location to read or write it. So, it is…
Tony92
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Assembly array access

I'm learning Assembly and I've got a question about array addressing. Suppose rsi holds the address of an array and I want to get the first byte of data starting at this address. Would the following two pieces of code do the job? If so, what is the…
Theta
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