Questions tagged [vpi]

Verilog Programming Interface. Also for PLI questions. Please provide details on the simulator you are working with.

VPI - Verilog programming interface.
PLI - Programming Language Interface

VPI is also known as PLI-2. VPI deprecates the original PLI interface.

VPI provides a generic interface to Verilog simulators that allows a user to query and manipulate the simulators data structures. VPI is conceptually similar to a compiler plug-in. Simulators do not produce (synthesize) final designs, but provide facilities for functional testing and verification. VPI can amend a simulation to give pseudo-timing information, to generate test vectors, and reports on Verilog code.

See: VPI at Wikipedia.

An example of using VPI with the open source simulator iverilog.

18 questions

votes

1 answer

Active direction of inout port during simulation using PLI

I am trying to find if an inout port is used as an input port or as an output port during simulation from my PLI based C-code. How can it be done?

system-verilog inout vpi

asked Feb 02 '18 at 19:12

Saurabh

votes

2 answers

Is it possible to call export function in VPI callback

I have the following scenario : I have a vpi callback that is triggered when an assertion is triggered. In this callback I want to call an export system verilog function I tried to setSvScope before the export but simulator gives me some errors.

system-verilog system-verilog-assertions system-verilog-dpi vpi

asked Jan 10 '18 at 14:18

Viktorinox

-3

votes

0 answers

How to access the members of a struct in SystemVerilog from C++ testbench?

I have a SystemVerilog hardware design, in which there is such a struct below (no need to care about what they exactly are, just an example here): typedef struct packed { logic [riscv::VLEN-1:0] pc; logic [TRANS_ID_BITS-1:0]…

c++ verilog system-verilog verilator vpi

asked Aug 26 '23 at 21:42

Sarah_lan

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