Questions tagged [thumb]

A reduced instruction set for ARM processors (based on a 16-bit encoding, instead of 32 bits in standard ARM mode), originally intended for embedded systems with a small amount of RAM. Also for question with the later Thumb2 mixed 16 and 32 bit instruction modes. Consider the tags 'slider' and 'thumbnails' for other meanings of 'thumb'.

This tag is for questions concerning the ARM CPU's operating mode called thumb. Questions about thumb assembly language, interworking between thumb and ARM mode as well as operating system issue in dealing with thumb mode are on topic.

The Thumb instruction set (16 bit only) with restricted use of r8-r15 was later extended to include a mix of 16 and 32 bit instructions. This was called Thumb-2. Thumb-2 is a marketing term. Different CPU families and even specific devices have different instructions. Thumb-2 is fairly meaningless in a technical sense (except it means variable length instructions (always two halfwords) are available along with 16 bit thumb instructions). Thumb-2 at wikipedia

On modern ARM CPUs, Thumb-2 is as rich as the traditional 32-bit mode and much more memory efficient.

For questions related to the scrollbar thumbs consider one of,

For questions about thumbnails, use the tag .

See also:

The paper Profile guided selection of ARM and thumb instructions gives some benchmarking of legacy thumb versus 32 bit modes. Different algorithms are faster in one mode versus the other. The paper is somewhat obsolete as Thumb-2 will be more efficient in modern (2014+) CPUs. Although some deeply embedded devices may only support Thumb.

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C Preprocessor/compiler directives to specify ARM or Thumb modes?

When working directly with ARM assembly I can use .thumb and .thumb_func and their analogous arm directives to instruct the assembler which flavor of instructions to output. Is there a matching compiler directive when developing C code? The GCC…
Fewmitz
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Questions about IT conditional codes in assembly

Most examples have IT commands such as the following, ITTE NE ; IT can be omitted ANDNE r0,r0,r1 ; 16-bit AND, not ANDS ADDSNE r2,r2,#1 ; 32-bit ADDS (16-bit ADDS does not set flags in IT block) MOVEQ r2,r3 ; 16-bit MOV ITT AL …
DarkLink
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Calling function in payload at ARMv7

I want to write a simple payload for my ARMv7 platform. First, I tried a simple loop sending a character via UART: void payload() { while(1) { USART3->DR = 0x68; } } 08000358 : 8000358: b480 push {r7} 800035a: …
float93
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Running old ARM code on WEC2013 (porting to 2013)

The compiler for WEC7 generates ARMv7 code. The compiler for WEC2013 generates Thumb2 code. Is there some mechanism for the OS to detect if an application is not Thumb2 code? i.e. Will any/all code built for WEC7 need to be rebuilt for WEC2013…
Doug
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Unknown opcode 'CBZ' using the uVision ARM compiler

Recently in my computer class we have stated working with the uVision ARM compiler. Now, I have done java for many years and understand how to program but ARM is giving me trouble. The program I am aiming to create is one where we convert uppercase…
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How to interpret the assembly boot code with ".word"

I'm slowly studying in step by step the boot code within assembly. I found the below assembly boot code. but I've still problem to understand completely. So far, as I understood, First of all, after line 1 execute, then go to line 2, then go to…
start01
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LPC4088 checksum value for Thumb?

In the LPC4088 user manual (p. 876) we can read that LPC4088 microcontroler has a really extraordinary startup procedure: This looks like a total nonsense and I need someone to help me clear things out... In the world of ARM I've heard countless…
71GA
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Tizen Studio No Thumb

I'm using Tizen Studio and I'd like to compile Mobile 3.0 Native Application without Thumb. However, when I build app with Debug configuration, I see -mthumb flag and I have no idea how to delete it. Tizen Studio 2.0
Roman Zavodskikh
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Ineffective stack management and registers allocation

Consider the following code: extern unsigned int foo(char c, char **p, unsigned int *n); unsigned int test(const char *s, char **p, unsigned int *n) { unsigned int done = 0; while (*s) done += foo(*s++, p, n); …
Piotr Nowak
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ROM vs RAM in ARM assembly and the AREA directive

So I had a simple ARM assembly (specifically THUMB) program being compiled for a TI Microcontroller. I'm just confused as to where EQU and DCD are stored in memory (RAM vs ROM) and how the AREA directive relates to that. I started off with this: Y1 …
rcplusplus
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All the ways you can switch from arm mode to thumb mode in the ARM architecture list them and explain in detail?

I could not find an answer to this question. Can you tell me when the ARM architecture switches from arm mode to thumb mode ? Explain all the ways in which the switching works.
srikanth
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Smart disassembly of TBB in ARM Thumb?

In ARM, a TBB (table branch byte) is basically a switch instruction, it gets a jump address from a table after the instruction based on the index passed in (switch value), then jumps to that address. ARM docs I am trying to automatically disassemble…
Chaos
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Trouble Combining ASM blocks in C

So i'm trying to rewrite a function from c into assembly, this was more of an exercise into writing assembly in C rather than making this more efficient. The problem I am having is I have working code in three asm() blocks but I can't seem to…
Dave_Peachy
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arm-linux-gcc -mthumb seems to generate regular arm code

I'm trying to compile a C program to the ARM Thumb-2 instruction set through GCC 6.2, using arm-linux-gnueabihf-gcc from the 6.2.0-5ubuntu12 package on Ubuntu GNU/Linux. The problem is I'm getting the same binary as when I'm not using the "-mthumb"…
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How to force gcc generate thumb 32 bit instructions?

Is it possible to force generating thumb 32 bit instructions when possible? For example I have: int main(void) { 8000280: b480 push {r7} 8000282: b085 sub sp, #20 8000284: af00 add r7, sp, #0 uint32_t a, b, c; …
jsmith
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