Questions tagged [thumb]

A reduced instruction set for ARM processors (based on a 16-bit encoding, instead of 32 bits in standard ARM mode), originally intended for embedded systems with a small amount of RAM. Also for question with the later Thumb2 mixed 16 and 32 bit instruction modes. Consider the tags 'slider' and 'thumbnails' for other meanings of 'thumb'.

This tag is for questions concerning the ARM CPU's operating mode called thumb. Questions about thumb assembly language, interworking between thumb and ARM mode as well as operating system issue in dealing with thumb mode are on topic.

The Thumb instruction set (16 bit only) with restricted use of r8-r15 was later extended to include a mix of 16 and 32 bit instructions. This was called Thumb-2. Thumb-2 is a marketing term. Different CPU families and even specific devices have different instructions. Thumb-2 is fairly meaningless in a technical sense (except it means variable length instructions (always two halfwords) are available along with 16 bit thumb instructions). Thumb-2 at wikipedia

On modern ARM CPUs, Thumb-2 is as rich as the traditional 32-bit mode and much more memory efficient.

For questions related to the scrollbar thumbs consider one of,

For questions about thumbnails, use the tag .

See also:

The paper Profile guided selection of ARM and thumb instructions gives some benchmarking of legacy thumb versus 32 bit modes. Different algorithms are faster in one mode versus the other. The paper is somewhat obsolete as Thumb-2 will be more efficient in modern (2014+) CPUs. Although some deeply embedded devices may only support Thumb.

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How to use Hi(r8-r12) register in Cortex-m0?

In ARM/Thumb architecture, there are 16(r0-r15) registers in a single cpu. Furthermore, Thumb-Instruction-Set can only use the first 8(r0-r7) registers and the r13,r14 and r15 register.But the last 5(r8-r12) register are still in the cpu. How can we…
王 magic
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arm instruction width specifiers cannot be compiled

I'm trying to disassemble and modify some code for arm. Disassembly shows some instructions with Instruction width specifiers, e.g: 80002be: f44f 5360 mov.w r3, #14336 ; 0x3800 80002c2: f2c4 0302 movt r3, #16386 ; 0x4002 80002c6: …
Zhani Baramidze
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arm vector table pointing one byte after

I have small application that compiles and runs well on my ARM Cortex M4. But when I disassemble binary file, that I flush, here is how first bytes look like: 00000000 <.data>: 0: 20020000 andcs r0, r2, r0 4: 080003b5 stmdaeq…
Zhani Baramidze
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Why is "ldr pc, [pc, #imm]" in thumb unpredictable

The THUMB2 reference specifies that LDR PC, [PC, #imm] (type 2) is unpredictable if the target address is not 4-byte aligned. From my experience, on some processors this works perfectly fine, and on others it fails miserably (which is why it took me…
Dany Zatuchna
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Get alignment in ARM Assembly preprocessing

I am in a situation where I need to store a pointer to the next instruction in Thumb-2 assembly code. Thumb-2 instructions can be 16- and 32-bit, and are thus halfword-aligned. When I use PC as the source operand in an add, I actually read the…
user1544337
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Compiling to ARM I get "Error: attempt to use an ARM instruction on a Thumb-only processor"

The following command /usr/bin/arm-linux-gnueabihf-gcc -O3 -DNDEBUG -march=armv7-a -mfloat-abi=hard -fPIC -fno-builtin -fno-exceptions -fomit-frame-pointer -funwind-tables -fno-stack-protector -fvisibility=hidden -fvisibility-inlines-hidden…
Serge Rogatch
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How to compile with clang for Thumb-only CPU?

I have tried -mthumb, it looks like the sources just get compiled for ARM. I have tried triple --target=thumbv7-linux-gnueabihf, but the build system just skips compiling the project. I know they somehow compile for Thumb-only target with the same…
Serge Rogatch
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SWI Thumb ASM command using registers

I am trying to call a software interrupt on a THUMB processor using swi however I've got an issue in that I want to use a value that is stored in a register as the x part of this command swi x. Firstly, is this possible? Secondly, here's what I've…
Zach Ross-Clyne
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How to move negative numbers in Thumb

I'm trying to move a negative value in thumb. In ARM its easy, mvn r0, #1 How can I move negative values to registers in Thumb? Thanks.
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ARM/Thumb interworking confusion regarding Thumb-2

I've been going through ARM ISA related documentation since a while and so far I believe that I've got a good understanding for the basics of ARM/Thumb interworking. I'll quickly summarize that in the following: Instructions can be either 4 byte…
Codoka
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How does Thumb Mode work in a more energy-efficient way than ARM?

As the Thumb use 16-bit instructions while ARM use 32-bit ones. By what means does the processor make it more energy efficient? By turning off some unit?
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STM32Cube - project does not build (Selected processor does not support Thumb mode)

I have generated a code base using STM32Cube for STM32F205RB to be used within Atollic TrueSTUDIO. The project does not build, giving the error: arm-atollic-eabi-gcc -c -mthumb -std=gnu90 -DUSE_HAL_DRIVER -DSTM32F205xx…
elliott.col
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About arm pc value in thumb 16/32bits mixed instructions stream

I read a couple of articles including question here in SO Why does the ARM PC register point to the instruction after the next one to be executed?, that pc register value is actually current executing instruction address plus 2 instructions ahead,…
Bill Randerson
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What happens when executing an illegal NEON instruction in thumb2 elf?

Say we have an thumb2 elf file with following disassemble snippet by objdump: 00279ae0 : 279ae0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 279ae4: 4606 mov r6, r0 279ae6: f8df 9338 ldr.w r9,…
Bill Randerson
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Atomic test-and-set for LPC1788 microcontroller

I'm working with the NXP LPC1788 microcontroller and I'm developing a multi-threaded application in C. In part of my application I define a custom linked-list data structure. I was previously having problems with my program due to concurrent access…
Tagc
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