Questions tagged [smp]

Symmetric multiprocessing

"Symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture." [Source: Wikipedia.]

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How does it work (in terms of implementation) the Memory Barrier instruction in weak consistency models for SMP systems?

I know that systems with PowerPC assembler machine and others (like Tilera) adopt a weak store ordering, which does not guarantee that memory operations are visible to the system in program order (memory ordering problem). Thus, in these kinds of…
Murray
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Can a multicore system allow two or more cores to simultaneously access the same memory location?

I am currently studying the ARM architecture. Can two cores on a multicore system simultaneously access the same memory location?
Adi s
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Understanding SMP concept in linux

Recently i have started getting into SMP programming, was trying to understand the concepts and experiment examples in Linux. When i started around Googling for the same, i came across the below book: UNIX Systems for Modern Architectures: Symmetric…
pkumarn
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How to restricit my cpu affinity to a subset of the cpus available on a given machine?

I am working on a machine with 4 sockets with another person that launch performance tests on one precise socket and does not want anybody to iterfer with this socket. I would like to work transparently on the 3 remaining sockets. How could could I…
janou195
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How this pthread actually works?

I am actually on my project on compiler with SMP, and want to code with pthreads and heard about many parallel things open mpi and so on, So to start with how this thread is allocated to core while calling pthread,Is there any way to give threads …
user289013
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Synchronization of Data in iOS

I am using SMP 2.3 to get the data from backend. Which is the best way to do this? - NSOperation,GCD,Thread or simply writing everything in the main Thread.
abhhab
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How to determine CPU mode on HPUX ia64 and Solaris

How do I determine whether the CPU mode is SMP, AMP or BMP on a HP-ux ia64 system? I've had a google and everything is telling me to check /proc/cpuinfo but this file (or folder for that matter) does not exist on my system Also could you tell me how…
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Why does block I/O completion take so long when crossing CPUs?

I am trying to squeeze the most performance out of a Linux block driver for a high-end storage device. One problem that has me a bit stumped at the moment is this: if a user task starts an I/O operation (read or write) on one CPU, and the device…
Eric Seppanen
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CPU stalling in SMP

We are facing an issue on which we need some help. Brief write-up : We have enabled SMP in Linux 2.6.39.4 kernel and cross compiled it for PPC-476. After booting, kernel is able to map both the processors (2 cores at h/w).…
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wait_event_interruptible_timeout always expires, even though wake_up event occurs in time

i have a question about what seems to be weird behavior of wait_event and wake_up on an Android embedded platform (Exynos5dual based) with a pre-emptive linux 3.0 kernel. It does not happen on a normal SMP laptop with a non-preemptive kernel (any…
cygnus
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Using QAtomicInt as memory fence

Again something about lock free... Suppose I implement a simple array based circular FIFO of integers. The FIFO is accessed by 2 threads single producer, single consumer. The read and write indexes are always updated AFTER the item is accessed. On a…
Waldorf
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Can irq smp_affinity replace the rps(receive package steering)?

I have a Netcard eth0,it has single queue and its IRQ number is 63, My question is: If I set /proc/irq/63/smp_affinity to fffff Whether means that the Linux kernel will distribute the IRQ of eth0 to each cpu in my system? is its function equal to…
Chinaxing
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mutex owner in SMP linux

In the kernel implementation of mutex, thread owner field exists only if it is a SMP build. I can understand that under good and clean code a thread will call release only if acquire was successful so we can save some cache and cpu cycles by not…
sgupta
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Kernel initialization on SMP system

When we start kernel on a SMP system, CPU0 starts kernel code where in main memory, cache and MMU specific to CPU0 is nitialized while CPUx are in WFI state. When cpu_up(x) is sent from CPU0, each of CPUx is then initialized and calls…
0x07FC
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is hierarchical memory SMP a contradicition in terms?

Symmetric Multiprocessing systems are homogeneous processors which share memory. I just saw this talk by Tim Mattson and he says at some point that hierarchical memory (cache levels) invalidate the precepts of SMP. Is this true? Why is it that I…
Dervin Thunk
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