Questions tagged [multiple-makefiles]
50 questions
0
votes
2 answers
How to compile multiple simple projects with GNU make
I am trying to implement various project from a programming book. My intention was to have each project exercise in its own folder and then have a makefile that compiles all of them with something like a make all. The folder structure is like…

afiori
- 465
- 3
- 15
0
votes
1 answer
How to Create a Makeflow for Compiling Multiple Drivers from other Makefiles in Subdirectories
I am relatively new to GNU makefiles and currently for my job, I am required to create a target in a makefile for a project to compile a bunch of drivers. Each driver already has their own makefile created in their own build directory and the…

djdrng
- 25
- 5
0
votes
1 answer
MacOS catalina Makefile not processing shell commands correctly that work in CLI
TL;DR:
This does not work in a Makefile in MacOS (catalina):
grab_setup_rule != cat $(all_makefiles_except_current) | grep -h -E '.+-setup:.*##' | awk '{ print $1 }'
but on executed on the command line, with $(all_makefiles_except_current)…

AntonioCS
- 8,335
- 18
- 63
- 92
0
votes
2 answers
How to dynamically rename an object file in a makefile
I am very very new to makefiles. The most complex task I had done before was to include new .h and and .cpp or .c in already designed makefiles.
I have to port the compilation process of a project from Visual Studio to gcc and there is an already…

zlogdan
- 279
- 1
- 6
- 16
0
votes
1 answer
Include Makefile and Echo Variables Inside Multiple Makefiles
Inside a Makefile I have recently had to look at, it includes this include $(MAKERULES)
Now to me, I would think somewhere at the top of the makefile it has MAKERULES = xyz but it does not. So I print out MAKERULES
test:
@echo "Rules:…

impression7vx
- 1,728
- 1
- 20
- 50
0
votes
1 answer
Makefile: macro is recast when including second file
I have a make file that has two includes like this :
$ cat /src/Makefile
include ../rules.mk
Test:
echo $(DIST_ROOT)
include src.base.mk
Test2:
echo $(DIST_ROOT)
. PHONY: Test Test2
$ cat /rules.mk
DIST_ROOT = $(abspath $(dir…

Thaodan
- 107
- 1
- 3
- 10
0
votes
1 answer
Multiple compilations with makefile
I've been having serious trouble with Makefiles, I'm trying to run those commands in it and so far most of the changes I made resulted in "Nothing to be done for 'all'" no matter I change the lines, it just don't work. For example, PROG4 should have…

Atik
- 89
- 1
- 1
- 12
0
votes
0 answers
how to check whether some c++ file got compiled from a bunch of c++ files (after using make command)
i want to know whether modified files got compiled from a bunch of c++ files . I am using "make" command for compiling c++ files.

rathod dinesh
- 13
- 4
0
votes
0 answers
How to call sub-makefiles without hardcoding their paths?
I have a folder structure like…

musicmatze
- 4,124
- 7
- 33
- 48
0
votes
2 answers
Need Help w/ Annoying Makefile Errors -- g++: g++ and shell errors -- and Multi-Makefile Design Advice
I have a makefile:
#Nice, wonderful makefile written by Jason
CC=g++
CFLAGS=-c…

Jason R. Mick
- 5,177
- 4
- 40
- 69
0
votes
4 answers
makefile calling makefile error
I have a working make, I have platform code and like several makes for each os in the folder. Right now I have one makefile which works. I renamed it to Makefile.ws and wrote this in Makefile
all:
make -f Makefile.w32
clean:
make -f…
user34537
0
votes
0 answers
Unexpected behaviour from make (windows) calling sub-nmake
Fashioning a makefile to build openssl for windows and am running into something that has me puzzled. I want to just have it built with one call to make, supplying the platform to build. There is a parent makefile which calls a sub-make having set…

Jon
- 1,675
- 26
- 57
0
votes
2 answers
How do i include a common module in 2 different applications(Android)
I need a little help with Android makefiles.
There is one common module for 2 of my applications. I planned to have a makefile for common modulecommon.mk and include it in both my applications.
Like this:
app1:
=====
main.c
Android.mk
...
...
…

Sandeep
- 18,356
- 16
- 68
- 108
0
votes
1 answer
Submakes not being re-run with different target
I'm trying to get a top-level makefile to call make in a number of subfolders. The top-level has several targets and the important bit is shown below:
MAKE_DIRS := $(dir $(wildcard apps/**/Makefile))
.PHONY: clean_apps apps…

user3677615
- 1
- 1
0
votes
1 answer
Android NDK: code under sub-directory isn't built at all
In my Android NDK project, I have the following structure:
jni/
Android.mk
... (more source files)
new-lib/
Android.mk
... (more source files)
In the top level Android.mk I have include $(call…

user842225
- 5,445
- 15
- 69
- 119