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Questions tagged [msr]

MSR (Model-Specific Registers) are registers inside the CPU that provide direct access to advanced CPU features.

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using rdmsr to check IA32_MCi_STATUS for bit 43 (IERR)

I'm trying to understand how to pull MSR and MCA data using rdmsr, and I can't quite get it to work how I expect it to work. Basically, I want to use rdmsr to check IA32_MCi_STATUS to see if bit 43 is tripped (IERR on my CPU), but instead of getting…
nuker186
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Unable to Write in MSR_EBC_FREQUENCY_ID (0x2C) on Pentium 4 Processor

I want to modify "Core Clock Frequency to System Bus Frequency Ratio BITS[31:24]" in register MSR_EBC_FREQUENCY_ID (0x2C) on Pentium 4 desktop processor by developing a Linux Kernel Module (LKM/Driver). Below the processor details. Name: Intel(R)…
Chinmay Mahata
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USB HID programming

I need some help getting started with programming a USB HID magnetic stripe reader device (MSR605X) in C#. I have some experience with an older model of this device which uses standard USB COM ports and I was able to access it via the SerialPort…
Joshua Tjon
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wrmsr operation not permitted exception?

I was working on msr registers to manipulate processor frequency to save power to one of our research project for HPC Systems. I have done following: [root@test/msr-tools-master]# ./rdmsr 410 -0 0000000000000000 We want to modify using…
Amarjeet Sharma
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What is msr primask?

I migrated a IAR project into Eclipse with IAR plugin. Then I wanted to switch from IAR compiler to GCC. And when I tried to compile I got this error: Error: selected processor does not support requested special purpose register -- `msr…
Alaa M.
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Difference between energy readings from /dev/cpu/cpu0/msr and /sys/class/powercap/energy_uj

I have found that I can measure the energy consumption using /dev/cpu/cpu0/msr file using MSR_PKG_ENERGY_STATUS, as well as reading /sys/class/powercap/energy_uj file. Although these two gives approximately the same value for a particular program, I…
user3883699
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How can I write to a debug register in Windows?

I want to write to a debug register on x64 Windows, from user mode. What is the easiest way to do it? (I could only come up with writing an assembly code inside a driver, and exporting this functionality) Thanks!
user5188701
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Exact interpretation of inline-assembly code?

I really wonder exact interpretation of inline assembly. I basically know how inline assembly looks like : __asm__ __volatile__(asms : output: input: clobber); And below is an example : void cpuGetMSR(uint32_t msr, uint32_t *lo, uint32_t *hi) { …
user3595632
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Root Has Segfault Executing RDMSR Assembly Code

I would like to read msr 0x19a (IA32_CLOCK_MODULATIOn) directly from C code WITH root privilege. However, I get the following segfault error. a.out[27843] general protection ip:40053b sp:7fffefc38020 error:0 in a.out[400000+1000] Does anyone know…
Wei Wang
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WRMSR on x86_64 64bit RCX register value is wrongly set

I want to write to the PMC1 register, so I want to set RCX to 188. The code I use to use WRMSR instruction is attached at the end. The problem is that I pass eax and ecx value (64bit) into the macro, but the %rcx register is always set to eax…
Mike
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Not able to read a sysfs file

I am trying to read the Machine Specific Registers (MSRs) by reading the sysfs files /dev/cpu/0/msr. It usually has read-write permissions for only the root. I update those permissions to 666 (of course using the sudo rights) and then try to read…
Osman Sarood
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Determining When the LBR Stack is Full

I'll start with some background on the project that I'm involved involved in. We are attempting to write a Linux kernel module (in the 3.5 kernel) that will enable the last branch record (LBR) feature present in some newer x86 processors and write…
Matt K
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What Model-Specific Register(s) control RAM error correction on Ivy Bridge Xeon?

How can one determine whether error correction is active on an Ivy Bridge system? (Requires the combination of a Xeon 12xx-v2 CPU and ECC UDIMMs). Ideally such a method would also run on systems without the requisite hardware (and return that ECC…
Ben Voigt
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