Questions tagged [itanium]

IA-64 Itanium (not to be confused with x86-64 / AMD64) is a family of 64-bit Intel microprocessors based on VLIW with explicit instruction-level parallelism, in which the compiler decides which instructions to execute in parallel. This contrasts with traditional superscalar architectures, which depend on the processor to manage all instruction dependencies at runtime. It is unrelated to x86-64.

Itanium (/aɪˈteɪniəm/) is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel markets the processors for enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel.

The Itanium architecture is based on explicit instruction-level parallelism, in which the compiler decides which instructions to execute in parallel. This contrasts with traditional superscalar architectures like x86 or ARM, which depend on the processor to manage instruction dependencies at runtime (to give the illusion of each instruction running in program order).

Itanium cores up to and including Tukwila execute up to six instructions per clock cycle.

http://en.wikipedia.org/wiki/Itanium

Itanium's EPIC (Explicitly Parallel Instruction Computing) is based on VLIW. The instruction format is a 128-bit VLIW bundle of 3x 41-bit instructions, and a 5-bit template which encodes instruction types, and "stops" which mark data dependencies between groups of VLIW bundles.


IA-64 is completely unrelated to x86-64 / AMD64, x86, or IA-32 (32-bit x86). The same company (Intel) was behind both IA-64 and IA-32, but the ISAs are completely different, IA-64 being a VLIW and x86-64 being a CISC with variable-length instructions and a small number of architectural registers.

Early Itanium hardware had hardware support for executing IA-32 instructions to ease adoption by the target market (people already using x86), and the manuals define which IA-64 registers are used for IA-32 state. It was later dropped in favour of software emulation.


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Source code analyzing tool for COBOL on VMS/VAX Platform

Can someone please recommend a tool for analyzing, improving, finding "dead code", provide statistics etc. for a source code on COBOL language on VMS/VAX OS and RDB Database? Thanks.
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Read and write process' memory through /dev/mem, text segment works but data segment can not, why?

I want to read to and write from process' memory through /dev/mem. First, I get process' memory map through a linux kernel module coded by myself, output is like this: start_code_segment 4000000000000000 end_code_segment …
Feng Gang
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Issue with "C/C++11 mappings to processors" in proposed NOP memory barriers for Itanium?

Although I don't read Itanium assembly, and I don't claim to understand its memory model, I have noticed something very strange and apparently contradictory in one proposed mapping of C/C++ atomics to Itanium. In C/C++11 mappings to processors the…
curiousguy
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HP-UX Itanium Compare and Swap

I am developing C/C++ cross-platform code, and the last platform is Itanium based HP-UX. Relevant machine an processor information can be found at the end of the question. I need to implement or find an atomic compare and swap for the machine and…
Maria
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how is machine-virtualization achieved without hardware support

this is with reference to machine virtualization. I am going through virtualization and got to know that With hardware assisted virtualization technique, privileged instructions are identified by trap-fault method and replaced with equivalent…
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How do I get cx_Oracle to work on 64-bit Itanium Windows?

I'm running Windows Server 2003 on a 64-bit Itanium server which is also running 64-bit Oracle 10.2, and I'd like to install cx_Oracle for Python 2.5. I've used cx_Oracle before many times on both Windows and Linux, and I've also compiled it before…
Eli Courtwright
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Tools for Memory Analysis on HP-UX Itanium

Looking for various tools (free/commercial) available for detection of memory leaks static/runtime on HP-UX Itanium platform. Background, we: Use HP-UX 11.31 ia64. But, all our applications are still 32bits only. Have software with object files…
compuneo
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Valgrind: The Impossible Happened IA-64 cached detected

I ran valgrind on a c program and got the following error: valgrind: the 'impossible' happened: IA-64 cache detected?! valgrind: m_threadstate.c:100 (vgPlain_get_ThreadState): Assertion 'tid >= 0 && tid < VG_N_THREADS' failed. After fixing some…
Notgate
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Why does the deleting destructor occupy a second vtable slot besides the ordinary destructor?

In C++ ABI implementations modeled after the Itanium C++ ABI, which is followed by many ABIs for other processors, virtual destructors actually occupy two vtable slots. Besides the "complete object destructor", which does what you would expect,…
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"Hello World" in Openvms/Itanium assembly example?

I've been searching the web for an example "Hello World" program written for the intel ia64 assembler on OpenVMS/Itanium. Has anybody done this? Thanks
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Are "ia64" and "amd64" interchangeable in clickonce manifests?

I'm working on a tool which modifies clickonce manifests. I found an ambiguity in the MSDN documents around the clickonce application manifest. It says: Specifies the processor. The valid values are msil for all processors, x86 for 32-bit…
Earlz
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Have any method make HP-UX 11.31(IA64) support 64-bit time_t

I'm be surprised to learn type long and time_t are 4-byte sized in this HP-UX 11.31(IA64). May I ask why? My environment: $ uname -a HP-UX bdev1 B.11.31 U ia64 0999202893 unlimited-user license $ cat /usr/include/sys/_time_t.h ...... # ifndef…
van
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What are the registers names in the IA-64 architecture?

As far as I know, the registers names in IA-64 are different from the registers names in x86-64/AMD64, but I am unable to find what the registers names are. I found on one website that the general registers in IA-64 are called r0 to r127, while I…
Tom
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Porting to Itanium & Gnat Ada

An application developed in Ada 83 with OpenVMS platform is to be migrated to Itanium with GNAT Ada compiler. What are the risks of this port? Is there a general acceptance plan for the migration in a general way. How can I validated this…
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OCaml native compiler for HP-UX IA64

Is there a way to build a stable OCaml native compiler for HP-UX IA64? I stumbled upon the comment below on https://news.ycombinator.com/item?id=6711348 We actively use/used OCaml in production on SPARC/Solaris, POWER/AIX, HP-UX/IA64. (The…