Questions tagged [itanium]

IA-64 Itanium (not to be confused with x86-64 / AMD64) is a family of 64-bit Intel microprocessors based on VLIW with explicit instruction-level parallelism, in which the compiler decides which instructions to execute in parallel. This contrasts with traditional superscalar architectures, which depend on the processor to manage all instruction dependencies at runtime. It is unrelated to x86-64.

Itanium (/aɪˈteɪniəm/) is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel markets the processors for enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel.

The Itanium architecture is based on explicit instruction-level parallelism, in which the compiler decides which instructions to execute in parallel. This contrasts with traditional superscalar architectures like x86 or ARM, which depend on the processor to manage instruction dependencies at runtime (to give the illusion of each instruction running in program order).

Itanium cores up to and including Tukwila execute up to six instructions per clock cycle.

http://en.wikipedia.org/wiki/Itanium

Itanium's EPIC (Explicitly Parallel Instruction Computing) is based on VLIW. The instruction format is a 128-bit VLIW bundle of 3x 41-bit instructions, and a 5-bit template which encodes instruction types, and "stops" which mark data dependencies between groups of VLIW bundles.


IA-64 is completely unrelated to x86-64 / AMD64, x86, or IA-32 (32-bit x86). The same company (Intel) was behind both IA-64 and IA-32, but the ISAs are completely different, IA-64 being a VLIW and x86-64 being a CISC with variable-length instructions and a small number of architectural registers.

Early Itanium hardware had hardware support for executing IA-32 instructions to ease adoption by the target market (people already using x86), and the manuals define which IA-64 registers are used for IA-32 state. It was later dropped in favour of software emulation.


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Visual Studio 2012 and Itanium target

I can't find clear indication regarding Itanium support in Visual Studio 2012. The IDE (VS 2012 Premium Release as included in MSDN subscription) lets you set corresponding target for C++ or C++/CLR project, but complains about missing toolset when…
Eugene Mayevski 'Callback
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Wrapper link options for HPUX Itanium

With PA-RISC version linker provides the +afs flag to alias function symbols and GCC provides the -wrap option. I am looking for a similar wrapper hook methodology to for HPUX 11iv3 Itanium. Any recommendation
Alan Ennen
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Building openjdk7 for Itanium64 on Suse Enterprise Linux Server

I'm having a bit of a sticky problem building openjdk7 on an Itanium server running Suse Linux Enterprise Server 11 SP2. I have successfully installed the Sun JDK 1.6 update 33 to serve as the bootstrap for the installation. And, I have downloaded…
jknowles
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Assembly code meaning in gdb

Good day! I have a core file, and I disassembled (using gdb) the method that crashed and I was told that the the value assigned to r44 below causes the crash. I am not well verse with assembly so I would like to ask what does 0x480 offset mean and…
ryanb
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crash on 64bt platform

I think I found a simliar thread here, but I could not understand much about it unfortunately as this is related to c++. My prob also seems to occure while I am trying to increment something. Incrementing `static int` causes SIGSEGV…
Rahul
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get exponent of float by assembly instruction from c on Intel Core i5/7

I'm reading a book bottom up and it have instruction to get exponent of float on c compiled via GCC: asm ("getf.exp %0=%1" : "=r"(exp) : "f"(d)); saying it works on Itanium. On my Core i7 GCC says Error: no such instruction: 'getf.exp %rax=%st'. …
Marisha
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iam getting error like ORA-27125: unable to create shared memory segment

When I am trying to create db instances, I am getting errors like below: SQL> ORA-27125: unable to create shared memory segment HPUX-ia64 Error: 12: Not enough space My system physical memory has 15.68 GB and my shmmax value is =…
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Wanted: multi-platform shell provider for code debugging, Itanium/IA64 preferred

Does anyone know of a UNIX shell provider that offers access to a multitude of platforms (e.g. Linux/Itanium, Max OS X/PPC, etc.) for debugging and portability testing? I suppose that since this is a common problem that there are such services, but…
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JDK6 IA-64 vs x86_64 Multithreaded issues

Has any programmer programmed Java-Multithreaded code and has seen different behavior between Itanium and x86_64 as code is running? Elements of unsynchronization or wrong locking on ConcurrentSkipListMaps or releasing of MappedByteBuffer ? I face a…
hephestos
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Does MinGW cross-compile IA64?

I want to cross-compile Windows IA64 binaries in Linux platform. Can MinGW be ported to do it?
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what is the g++ option to build ia64 binaries

what is the g++ option to build ia64 binaries
Avinash
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Missing ia64 or itanium 64 bit build target on Visual Studio 2010

with so many versions on this subject, couldn't find an answer : vs 2010 - professional i have all target platforms but i can't find Itanium or IA64 i have tried googling it and couldn't find any info regarding a problem such as i have . what am i…
LoneXcoder
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Are IA64 and SPARC chips RISC or CISC architecture?

I have a very basic questions about these architectures are these architecture RISC-based or CISC-based? pipeline stages in both and instruction set format for both Please help me
vicky
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x64 compatible C source

I think I know what #ifdefs I need to use to be x86-32 and x86-64 compatible on both msvc and gcc, see below. Is this complete for those platforms? #if defined(_MSC_VER) # if defined(_M_IA64) || defined(_M_X64) # define SIZEOF_SIZE_T 8 # …
Jonas Byström
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ld: Mismatched ABI (not an ELF file) cannot compile

i have simple C hello world program and i wanted to compile it on HP-UX ia64 11.31,but i get the following error /* Hello World program */ #include main() { printf("Hello World"); } cc -v +DD64…
anjalis
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