Stack Overflow
Stack Overflow

Questions tagged [intel-mic]

Intel Many Integrated Core Architecture

Intel MIC (Intel Many Integrated Core Architecture) is a coprocessor computer architecture developed by Intel and used in Intel Xeon Phi processor product family.

More information

66 questions
3
votes
2 answers

How can we know whether Intel Xeon Phi coprocessor is present or not

I want to run a program on Intel Xeon Phi coprocessor. How can I know whether my machine has an Intel Xeon Phi coprocessor or not.
Alvin
  • 940
  • 2
  • 13
  • 27
3
votes
1 answer

loaddup_pd/unpacklo_pd on Xeon Phi

If I have the following doubles in a 512-wide SIMD vector, as in a Xeon Phi register: m0 = |b4|a4|b3|a3|b2|a2|b1|a1| is it possible to make it into: m0_d = |a4|a4|a3|a3|a2|a2|a1|a1| using a single instruction? Also since there are no bitwise…
user1715122
  • 947
  • 1
  • 11
  • 26
3
votes
1 answer

How to use Vtune Analyzer API on linux

I want to use Vtune Profiler APIs to profile a code running on Xeon Phi (Linux, using offload execution) to see the number of instructions executed, the number of L1 cache misses, etc. But I can't find anywhere explaining how to use this library.…
Zk1001
  • 2,033
  • 4
  • 19
  • 36
2
votes
1 answer

What it takes to make OpenACC/OpenMP4.0 offloading to nvidia/mic work om GCC?

I am trying to understand how exactly I can use OpenACC to offload computation to my nvidia GPU on GCC 5.3. The more I google things the more confused I become. All the guides I find, they involve recompiling the entire gcc along with two libs…
AstrOne
  • 3,569
  • 7
  • 32
  • 54
2
votes
1 answer

Manually control Intel MIC SIMD operations by intrinsics or instructions

I wants to manually manage my code's the SIMD operations on MIC, and write the intrinsics below _k_mask = _mm512_int2mask(0x7ff); // 0000 0111 1111 1111 _tempux2_512 = _mm512_mask_loadunpacklo_ps(_tempux2_512,_k_mask,…
user3317622
  • 23
  • 4
2
votes
1 answer

Can we have concurrent offload on Xeon Phi

On the Nvidia GPU, we can have multiple kernels running concurrently by using the Streams. How about the Xeon Phi? If I offload two part of computation code by different threads, will they run concurrently on the Xeon Phi?
Archeosudoerus
  • 1,101
  • 9
  • 24
2
votes
1 answer

MKL 3D double precision complex FFT on Intel Xeon Phi

I've developed C code for a 3-dimensional FFT (MKL interface) to run natively on an Intel MIC platform. Data elements are double precision complex for a complex-to-complex transform. I'm using a padded leading dimension, mkl_malloc() 64-byte…
user2810347
  • 21
  • 1
2
votes
1 answer

Using GCC on Xeon Phi

I was told one can run a program on MIC that was built with gcc. Is that true? If yes, how to proceed? I'm using gcc version 4.4.7.
Éric
  • 419
  • 5
  • 17
2
votes
1 answer

Intel MIC offloading -- how does it work with STL?

I'm working with a system that's implemented in C++/OpenMP code, and it uses STL and Eigen's data structures all over the place. Algorithmically, the code seems like a great candidate for acceleration with the new Intel MIC (Xeon Phi) cards. A…
solvingPuzzles
  • 8,541
  • 16
  • 69
  • 112
1
vote
2 answers

ICC compiler - error: parallel loop condition does not test loop control variable

I am trying to parallelize a "for loop" of my C/OpenMP code, after offload call on Intel MIC (Xeon Phi) card. I am using "#pragma omp parallel for" and it compiles good when I use an integer variable as "loop control variable". On my code I am using…
wasilis
  • 115
  • 1
  • 8
1
vote
1 answer

How to bind my job to intel xeon phi coprocessor?

I have a server with four mic cards (mic0-mic3), and it works well. how to bind a parallel job(mic_app) to mic0, other parallel job can not run in mic0. how to detect the mic0 has been running for a parallel job(mic_app).
LEo
  • 442
  • 5
  • 21
1
vote
1 answer

Segmentation fault due to data alignment issue on MIC

I have two arrays say 'fa' and 'tempxyz'. I need to subtract one from the other and store it in another array. I am using streaming stores. So I need to have aligned accesses. I aligned these two arrays and also the third array. I am still getting a…
Jagannath
  • 47
  • 7
1
vote
2 answers

How to profile an openmp code natively on Intel MIC?

I have an openmp code written in C. I executed the code on Intel MIC on Stampede. I want to profile the code to find the hotspots in the code so that it will be helpful for me to optimize the code further. I tried to use the profiler gprof but I…
Jagannath
  • 47
  • 7
1
vote
1 answer

How to differentiate between Intel Xeon Phi Coprocessors 7120P, 7120X, 7120D, 7120A

I have a Xeon phi coprocessor 7120P. When i run micinfo, i see board SKU to be C0PRQ-7120 P/A/X/D. I notice that the SMC HW Revision states Product 300W Passive CS and i read on tomshardware that P stands for passive cooling for the intel xeon phi…
hrs
  • 487
  • 5
  • 18
1
vote
1 answer

xeon phi timer resolution

My main aim was to insert 1ms delay in xeon phi coprocessor but I was getting ~9ms difference in my results. So, I tried experimenting with xeon host machine and phi coprocessor to find the timer resolution. I executed the following code: …
Surya Narayanan
  • 35
  • 1
  • 3
1
2
3 4 5