Questions tagged [instruction-reordering]

31 questions
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How to demonstrate Java instruction reordering problems?

With Java instruction reordering the execution order of the code is changed by the JVM at compile time or run time, possibly causing unrelated statements to be executed out-of-order. Edit: [Instruction reordering can produce counter-intuitive…
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Optimizations around atomic load stores in C++

I have read about std::memory_order in C++ and understood partially. But I still had some doubts around it. Explanation on std::memory_order_acquire says that, no reads or writes in the current thread can be reordered before this load. Does that…
7
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sequenced-before modification order consistency

from http://en.cppreference.com : Relaxed ordering Atomic operations tagged std::memory_order_relaxed are not synchronization operations, they do not order memory. They only guarantee atomicity and modification order consistency. For example, with x…
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Is using std::atomic_thread_fence right before an atomic load/store with the same order always redundant?

Given: std::atomic b; void f() { std::atomic_thread_fence(std::memory_order::memory_order_acquire); uint64_t a = b.load(std::memory_order::memory_order_acquire); // code using a... } Can removing the call to…
Joseph Garvin
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How does Google's `DoNotOptimize()` function enforce statement ordering

I'm trying to understand exactly how Google's DoNotOptimize() is supposed to work. For completeness, here is its definition (for clang, and non-const data): template inline BENCHMARK_ALWAYS_INLINE void DoNotOptimize(Tp& value) { asm…
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Does memory_order_relaxed respect data dependencies within the same thread?

Given: std::atomic x; uint64_t f() { x.store(20, std::memory_order::memory_order_relaxed); x.store(10, std::memory_order::memory_order_relaxed); return x.load(std::memory_order::memory_order_relaxed); } Is it ever possible…
Joseph Garvin
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Can object access be reordered with that object's final field access in Java?

Below code sample is taken from JLS 17.5 "final Field Semantics": class FinalFieldExample { final int x; int y; static FinalFieldExample f; public FinalFieldExample() { x = 3; y = 4; } static void…
Nikita Tkachenko
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memory model, how load acquire semantic actually works?

From very nice Paper and article about memory reordering. Q1: I understand that cache-coherence, store buffer and invalidation queue is root cause of memory reordering ? Store release is quite understandable, have to wait for all load and store are…
LongLT
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What's the relation between instruction reordering done by a compiler and instruction reordering done by a cpu?

OK, so a compiler is free to reorder code fragments for performance reasons. Let's suppose some code snippet, translated directly into machine code with no optimizations applied, looks like…
Peter
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2
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About c++ memory order: how to keep other threads to access common resources safely?

This is my code: Godbolt. #include #include #include #include int main(int, char **) { volatile bool resource = true; std::atomic_bool stop{false}; std::atomic_int working{0}; std::thread…
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Is the compiler allowed to reorder statements around `std::condition_variable::notify_one`?

The following code is a struct I have written to allow me to queue up work to run on multiple worker threads, and which blocks the main thread until a new worker thread is available. struct WorkQueue{ const std::size_t size; …
2
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1 answer

Interlocked.CompareExchange instruction reodering of the initialvalue

Iam wondering if its possible that the initialvalue in the following code can be reordered to be after the computation resulting in undefined behavior. The following example is taken from…
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Why does this C++ code crash with an apparent memory ordering race condition?

Why does this kind of code crash (very occasionally!) on x64? class Object { public: void manipulate(); // reads and writes object bool m_finished = false; // note this is a regular bool and NOT atomic } Thread…
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Who actually does the out of ordering of the memory accesses in MPCore?

As per my current understanding from the ARM Cortex A57 and A78 TRM, micro ops can be issued out of order to 1 among the several execution pipelines. This is instruction reordering for independent instruction as far as I understood. Memory access…
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Why debug execution order doesn't match code order in c++?

I am new to C++. When I debugged in Clion, I found that the execution order using Step over (F8) doesn't match the real code's order. So far, I think the most possible reason is compiler optimization. I have no impression that I've enabled this and…
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