Questions tagged [instruction-encoding]
99 questions
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immediate value encoding in ARM assembly
I'm learning about assembly language right now and I'm a bit confused about how the immediate values are encoded. Can someone explain why the following values are valid: 0xff00ff00, 0xffffffff, 0x007f8000? Also why are the values 0xff0000ff,…
ahahahahana
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Assembly, Moving 64-bit Immediate to memory?
I was reading:
why we can't move a 64-bit immediate value to memory?
In one of the answers it's mentioned:
mov reg64, imm (in intel syntax, destination first) is the only
instruction that accepts a 64-bit immediate value as a parameter.
That's why…
algo
- 101
- 6
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1 answer
Encoding memory operands using the RSP register in x64 - SIB byte needed?
I'm trying to understand how to encode reads on the RSP register in x86-64.
For example, I have some code like this:
.section __TEXT,__text
.global _main
_main:
push %rsp
push (%rsp)
mov %rsp, %rax
mov (%rsp), %rax
When I assemble and dump…
Aaron Patterson
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Encoding x86-16 instruction with immediate operand
I am venturing into decoding instructions, for now on 80x86 16bit machines, I don't have many problems in decoding instructions that do not have an immediate value as their source operand, the problem arises when the source operand is no longer a…
mattstack
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1 answer
How to read x86 instruction tables from this site
I'm reading https://www.felixcloutier.com/x86/mov (mov as example) and there are these opcodes in the tables like 88 /r and REX + 88 /r and even REX.W + 8C /r. I couldn't find an explanation at the website. What does r, REX, REX.W, and 8C mean? How…
Guerlando OCs
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How does x86 handle byte vs word addressing when executing instructions and reading/writing data?
So I am learning how x86 works and have come across people saying that it is byte-addressable, yet can read words, double words, etc.
How does the processor decide which method to use and when?
E.g. for accessing the next instruction and when a user…
kingstoncompsci
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1 answer
How to determine if ModR/M is needed through Opcodes?
I am reading the ia-32 instruction format and found that ModR/M is one byte if required, but how to determine if it is required, someone says it is determined by Opcode, but how? I want to know the details, and is there some useful and authoritative…
cong
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1 answer
MIPS Instruction Decoding
I'm trying to understand how to decode MIPS binary instructions.
I compiled a hello world program in C on a Debian MIPS system with gcc and objdump shows me that the first instruction in the .text section is:
600: 03e00025 move zero,ra
I…
Stefan
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2 answers
Why doesn't my assembler use the 05 opcode (add eax,imm32) short form the manual documents for ADD EAX,1 but it does for 04 ADD AL, 1?
I am writing an x86-64 assembler. I was looking through the Intel x86 manual volume 2, trying to understand how to generate the correct instructions from the assembly. I mostly understand how it works but have been assembling and disassembling…
jrb93
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1 answer
How can I convert assembly code into binary code?
I created a simple c++ source file with the following code:
int main() {
int a = 1;
int b = 2;
if(a < b) {
return 1;
}
else if(a > b) {
return 2;
}
else {
return 3;
}
}
I used the objdump…
Abhisheyk Deb
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1
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1 answer
Encode MIPS BEQ instruction to Hex machine code manually
I'm trying to translate the following command to Hex:
beq $s1,$t3,label
It's also given that the command address is 0x1500, and the label address is 0x1000.
So far i know that beq equals 4(hex) and the binary values of the registers.
I know that at…
dor-b
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1 answer
x64 instruction encoding (r/m, reg vs reg, r/m)
What's the difference in encoding (ModRM:r/m, ModRM:reg) vs (ModRM:reg, ModRM:r/m)? Specifically say an instruction like CMPXCHG vs DIVPD. I thought the register and address was always encoded in the first byte and then the SIB and displacement in…
Ryan Brown
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1 answer
intel x64 REX prefix
For these two instructions (https://www.felixcloutier.com/x86/adc):
12 /r ADC r8, r/m8 - Add with carry r/m8 to byte register.
REX + 12 /r ADC r8*, r/m8* - Add with carry r/m641 to byte register.
*In 64-bit mode, r/m8 can not be encoded to…
Ryan Brown
- 1,017
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1
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1 answer
ARM instruction to hex for loads like pc-relative LDR
I've been trying to translate the arm instruction to hex which include PC register, for example
ldr rx, [pc, #xx]
I have checked the "ARM Architecture Reference Manual", and the description of LDR instruction is as below:
Questions appeared,
…
SammyJiang
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0 answers
Is the encoding "66| 48/ 0F 50 D8" in MASM for reg=rbx in "MOVMSKPD reg, xmm" correct?
In MOVMSKPD reg, xmm, VMOVMSKPD reg, xmm2, or VMOVMSKPD reg, ymm2 I think reg is r32 or r64.
But in MASM, I tested and got the following results :
MOVMSKPD rbx, xmm0 ;OK, 66| 48/ 0F 50 D8
MOVMSKPD ebx, xmm0 ;OK, 66| 0F 50 D8
I doubt whether this…
YutakaAoki
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