Questions tagged [gnu-make]

This tag is for questions about `gmake`, the GNU version of the `make` utility to maintain and update programs.

GNU Make is the GNU implementation of the Make utility. It is probably the most common version in use today.

GNU Make supports extensions to the Make language beyond the POSIX standard, therefore GNU Make solutions may not work under other versions, so the gnu-make tag is appropriate for questions from those using GNU Make, or pertaining to makefiles written for it.

Documentation

The latest GNU Make manual can be found in several formats here.

See also

make makefile

4424 questions
43
votes
2 answers

Remove prefix with make

Is there a way to remove a prefix from a string (a pathname in my case) in make? As an example, suppose I had the string: FILES = a/b/c.d a/b/e.f I want to remove the a/, and be left with b/c.d b/e.f I have tried using various combinations of dir,…
Lee Netherton
  • 21,347
  • 12
  • 68
  • 102
42
votes
1 answer

The difference between .mk file and Makefile

I've just begun to study Porting Android. And I come across a new type of file which is .mk file. It's is an extension of Makefile but I don't know what it is different from a Makefile ? So, can somebody help you clarify them. Thanks very much !
hugtech
  • 877
  • 3
  • 11
  • 16
42
votes
4 answers

Implementing `make check` or `make test`

How can I implement a simple regression test framework with Make? (I’m using GNU Make, if that matters.) My current makefile looks something like this (edited for simplicity): OBJS = jscheme.o utility.o model.o read.o eval.o print.o %.o : %.c…
J. C. Salomon
  • 4,143
  • 2
  • 29
  • 38
42
votes
3 answers

Wildcard to obtain list of all directories

In my Makefile I need to get a list of all directories present in some other directory. To get a list of all directories in the same folder as my Makefile I use: DIRECTORIES = $(wildcard */) all: echo $(DIRECTORIES) which works fine, and gives…
Haatschii
  • 9,021
  • 10
  • 58
  • 95
42
votes
3 answers

Parallel make: set -j8 as the default option

I can set number of threads for the build process using -j argument. For example, I have 4 cores +4 virtual. When I write: make -j8 the speed increases 4 times. Is it possible to set that value as default? (For example, in Linux Gentoo, in config…
Max Frai
  • 61,946
  • 78
  • 197
  • 306
41
votes
2 answers

What is the Makefile Target `.c.o` for?

Someone recently mentioned the target .c.o in Makefiles for cross compatability, but I fail to understand its purpose. Can anyone clarify?
chacham15
  • 13,719
  • 26
  • 104
  • 207
40
votes
5 answers

How to check return value from the shell directive

In my Makefile, I need to test if the current directory is an SVN repo or not and if it is not I want to indicate an error using the $(error) directive in Makefile. So I plan to use the return value of $(shell svn info .) but I'm not sure how to get…
Tuxdude
  • 47,485
  • 15
  • 109
  • 110
38
votes
1 answer

How do I split a string in make?

I need to take a parameter in my Makefile that consists of a host identifier in the form host[:port] where the colon and port are optional. So all of the following are valid: foo.example.com ssl.example.com:443 localhost:5000 etc. I want to split…
Joe Shaw
  • 22,066
  • 16
  • 70
  • 92
36
votes
3 answers

Compile all C files in a directory into separate programs

Is there a way using GNU Make of compiling all of the C files in a directory into separate programs, with each program named as the source file without the .c extension?
user325117
36
votes
3 answers

GNU Make silent by default

Is it possible to suppress command echoing by default from within the Makefile? I know that running make in --silent mode will do it, as will prefixing every command with @. I'm looking for a command or stanza I can include inside the Makefile,…
salezica
  • 74,081
  • 25
  • 105
  • 166
36
votes
2 answers

Can I obtain just the second prerequisite in GNU make?

Possible Duplicate: How to get the second dependency file using Automatic Variables in a Makefile? I am using GNU make, and I'm using automatic variables such at $<, $^ etc. I know that $< is just the first prerequisite, and $^ is all the…
pauldoo
  • 18,087
  • 20
  • 94
  • 116
34
votes
3 answers

Getting make to create object files in a specific directory

GNU Make 3.82 gcc 4.7.2 c89 I have the following make file: INC_PATH=-I/home/dev_tools/apr/include/apr-1 LIB_PATH=-L/home/dev_tools/apr/lib LIBS=-lapr-1 -laprutil-1 RUNTIME_PATH=-Wl,-rpath,/home/dev_tools/apr/lib CC=gcc CFLAGS=-Wall -Wextra -g -m32…
ant2009
  • 27,094
  • 154
  • 411
  • 609
33
votes
2 answers

GNU make: Multiple targets in a single rule

Possible Duplicate: GNU Makefile rule generating a few targets from a single source file If I have a Makefile rule like this: a b c: echo "Creating a b c" touch a b c output: a b c cat a b c > output and I run make -j9 output make…
Pavel
  • 5,320
  • 8
  • 35
  • 45
33
votes
3 answers

Object file was built for newer OSX version than being linked

I'm getting this error for C++ library I'm using. It uses GNU Automake for building. Which flag(s) I should supply for the make command to lower the target build platform to avoid seeing this warning in Xcode project where I'm trying to link against…
peetonn
  • 2,942
  • 4
  • 32
  • 49
32
votes
5 answers

Parallel makefile requires dependency ordering

I have the following piece of makefile: CXXFLAGS = -std=c++0x -Wall SRCS = test1.cpp test2.cpp OBJDIR = object OBJS = $(SRCS:%.cpp=$(OBJDIR)/%.o) all: test1 release: clean test1 test1: $(OBJS) $(CXX) -o $@ $(OBJS) $(OBJDIR)/%.o:…
kyku
  • 5,892
  • 4
  • 43
  • 51