What is the Makefile Target `.c.o` for?

Question

Someone recently mentioned the target .c.o in Makefiles for cross compatability, but I fail to understand its purpose. Can anyone clarify?

score 48 · Accepted Answer · answered Feb 10 '12 at 19:16

48

It's an old-fashioned suffix rule. The more up-to-date way to do it is to use a pattern rule:

%.o : %.c

answered Feb 10 '12 at 19:16

Carl Norum

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score 2 · Answer 2 · answered Feb 10 '12 at 19:15

2

It's a canned rule for translating .c files, i.e. C modules, to .o object files. It exists so you don't have to write this rule yourself and is parameterized by Make variables such as CC (the C compiler to use), CFLAGS (compiler flags), etc.

So, if you use this implicit rule to compile C modules and don't tinker with any Make variables, then the person building your code can specify a compiler and flags on the command line without editing the Makefile.

answered Feb 10 '12 at 19:15

Fred Foo

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but you can do that with the pattern rule as well: `make "CC = gcc"` for example – chacham15 Feb 10 '12 at 19:20
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@chacham15: that's right. `.c.o` is the older way of doing this. – Fred Foo Feb 10 '12 at 19:21

What is the Makefile Target `.c.o` for?

2 Answers2