Stack Overflow
Stack Overflow

Questions tagged [altivec]

AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple, IBM and Freescale Semiconductor, formerly the Semiconductor Products Sector of Motorola, (the AIM alliance), and implemented on versions of the PowerPC including Motorola's G4, IBM's G5 and POWER6 processors, and P.A. Semi's PWRficient PA6T.

52 questions
1
vote
2 answers

How to load a small constant into a vector?

Please forgive my ignorance with the question below. We are supporting GCC 4.8 (and above) and IBM XL C/C++ 12 (and above). We are also supporting big and little-endian on AIX and Linux. The compilers and platforms have made the code fairly…
jww
  • 97,681
  • 90
  • 411
  • 885
1
vote
1 answer

The parameter type is not valid for a function of this linkage type

I'm working on AIX with IBM's XL C compiler. I'm catching a compile error and I'm not sure how to proceed: $ xlc -g3 -O0 -qarch=pwr8 -qaltivec fips197-p8.c -o fips197-p8.exe "fips197-p8.c", line 59.16: 1506-754 (W) The parameter type is not valid…
jww
  • 97,681
  • 90
  • 411
  • 885
1
vote
1 answer

Is it possible to rotate a 128-bit value in Altivec?

I'm trying to port some ARM NEON code to AltiVec. Our NEON code has two LOAD's, one ROT, one XOR and a STORE so it seems like a simple test case. According to IBM's vec_rl documentation: Each element of the result is obtained by rotating the…
jww
  • 97,681
  • 90
  • 411
  • 885
1
vote
3 answers

Equivalent for SSE in Power PC

What is the equivalent for SSE instruction set on Power PC? Is it Altivec? Does anyone have any samples for migrating SSE instructions to Power PC?
Deepali Chourasia
  • 41
  • 2
1
vote
0 answers

can't find materials about SSE2, Altivec, VMX on apple developer

as Paul. R sugguested that there are plenty of resources about SSE2 , AVX on apple developer but I couldn't find it. Could anyone helps me ? BTW, I also looking for the archive of mail-list of altivec. thanks! Intel SSE and AVX Examples and…
prgbenz
  • 1,129
  • 4
  • 13
  • 27
1
vote
2 answers

Does the AltiVec vec_ld() work only with 16-byte aligned variables?

In gcc 4.1.2, vec_ld() does not work correctly on board of CPU MPC74XX. float temp[4]; __vector float Src; Src = (__vector float)vec_ld(0, temp); However, if float variable is aligned to 16 bytes, it works correctly: float temp[4]…
Boblishus
  • 87
  • 1
  • 7
1
vote
1 answer

altivec extract part of the vector?

I'm trying to compare one 64-bit value with a 64-bit value array, say R_UINT64 FP; R_UINT64 INPUT[20000]; It returns true if any element in the array matches the value of FP. I have to loop through this array and find a match, I'm trying to improve…
Tal_
  • 761
  • 2
  • 6
  • 13
1
vote
1 answer

_mm_srli_si128 equivalent on altivec

I am porting a program written in SSE 4.2 to Altivec. I have a problem in finding the equivalent for the intrinsic _mm_srli_si128. When I googled I found vec_slo as the equivalent. Here is my sample program for shifting the contents by 1 byte…
sunmoon
  • 1,448
  • 1
  • 15
  • 27
1
vote
1 answer

Handling Altivec loads and stores regardless of PPC endianness?

I have some SIMD code in Altivec processing 32 bit integer values in parallel. In some cases I want to load the integers as little endian, in other cases as big endian (note: this choice is regardless of the native CPU endianess; it is based on what…
Jack Lloyd
  • 8,215
  • 2
  • 37
  • 47
0
votes
1 answer

Altivec vec_all_gt equivalent on arm neon

I am porting an application from Altivec to Neon. I see a lot of intrinsics in Altivec which return scalar values. Do we have any such intrinsics on ARM ? For instance vec_all_gt
sunmoon
  • 1,448
  • 1
  • 15
  • 27
0
votes
2 answers

Compilation error using AltiVec SIMD vector type in C++

Following is the code: int add = foo; vector signed int v_add; v_add[0] = add; The error is: error: invalid types 'vector int[int]' for array subscript Problem stays when I try add = v_add[0]; Please explain the cause of this problem. I am using…
ympolo
  • 1
  • 2
0
votes
0 answers

will 32-bit altivec code work on 64-bit machine

I am porting altivec code from PPC to Intel architecture. The current altivec code is 32-bit. My Intel CPUs are 64-bit. Will a 32-bit compiled code run on a 64-bit machine? Can a 32-bit Altivec code be compiled for a 64-bit machine? thnx
shok
  • 1
  • 1
0
votes
0 answers

"-qaltivec" is not compatible with "-qarch=pwr5"

I'm having trouble understanding a warning from IBM XL C/C++. I'm working on GCC119 from the compile farm, which is a AIX ppc64-be machine. $ cat test.cxx #if defined(__ALTIVEC__) # include # undef vector # undef pixel # undef…
jww
  • 97,681
  • 90
  • 411
  • 885
0
votes
1 answer

Is there a XL C builtin for LXVD2X prior to 13.1.4?

I'm working from C/C++ using built-ins. I need the lvd2x instruction to load unaligned data into a VMX register. It looks like lvd2x is available on Power7 and Power8 processors. GCC provides vec_vsx_ld built-in to perform the task. According to IBM…
jww
  • 97,681
  • 90
  • 411
  • 885
0
votes
1 answer

SIMD with Altivec: why is multiplying two vectors faster than adding two vectors?

I've been implementing basic math operations using altivec as a way to learn simd for an upcoming project. Also, just as a way to see the performance benefit of it, I track how long it takes to perform the operations, but I came across something…
shaboinkin
  • 171
  • 1
  • 11
1 2
3
4