AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple, IBM and Freescale Semiconductor, formerly the Semiconductor Products Sector of Motorola, (the AIM alliance), and implemented on versions of the PowerPC including Motorola's G4, IBM's G5 and POWER6 processors, and P.A. Semi's PWRficient PA6T.
Questions tagged [altivec]
52 questions
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SIMD program compilation issue
I have a simple SIMD program for vector addition
/*
* FILE: vec_add.c
*/
#include
#include
/*
* declares input/output scalar varialbes
*/
int a[4] __attribute__((aligned(16))) = { 1, 3, 5, 7 };
int b[4]…
likeGreen
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Equivalent of mm_storel_epi64 in AltiVec?
I am working on a project using AltiVec programming interface.
In one place I want to store 8 bytes from a vector register to a buffer.
In SSE, we have an intrinsic _mm_storel_epi64 to store lower 8 bytes of a SIMD register to a buffer.
Any ideas on…
sunmoon
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Handling page faults with vec_ld
I have the following program to load a vector in to vector register.
char *buf = (char *)malloc(10);
vector unsigned char t = vec_perm( vec_ld( 0, (unsigned char *)buf),
vec_ld( 15, (unsigned char *)buf),
…
sunmoon
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Altivec Programming Resource
Would be required to port some programming codes on Windows onto PowerPC. The codes would need some kind of optimisation and require the use to Altivec programming.
Would like to ask where to find a good beginner guide to Altivec and any SIMD…
user1538798
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Altivec compile error
I'm trying to follow a simple sample altivec initialization like this:
1 // Example1.c
2 #include
#include
3
4 int main()
5 {
6 __vector unsigned char v1;
7
8 // Assign 16 8-bit elements to vector v1
9 v1 =…
Tal_
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fftw simd-altivec.h cannot compile
I'm using fftw on a Mac using Xcode 4.4. In my project, I added the whole fftw source code into the project and tried to compile it.
It cannot compile successfully, because in the simd-altivec.h, it gives errors like these:
ALTIVEC only works in…
Weibin Shen
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What does this PPC assembly listing do, using lwz from 0(r12) and 4(r12) before a BCTR indirect jump?
I found the following procedure in dissasembly:
lwz r0, 0(r12)
stw r2, 0x14(r1)
mtctr r0
lwz r2, 4(r12)
bctr
What does this listing do? Is it AltiVec code?
What is the C-equivalent of this procedure?
void_17
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