Yes, AltiVec loads and stores require 16 byte alignment. This is very well documented in the AltiVec manuals.
Unlike other SIMD architectures such as SSE however, note that AltiVec silently truncates unaligned addresses to the next lowest 16 byte boundary, rather than generating an exception, so your code will not crash, but it will not behave correctly if you attempt to load or store at an unaligned address.
In cases where you can not avoid unaligned loads you can load two adjacent aligned vectors and then use vec_lvsl
+ vec_perm
to create the required vector:
float temp[4];
__vector float sr1, src2, src;
src1 = vec_ld(0, temp);
src2 = vec_ld(16, temp);
src = vec_perm(src1, src2, vec_lvsl(0, temp));